IDTSTAC9751XXTAEC1XR IDT, Integrated Device Technology Inc, IDTSTAC9751XXTAEC1XR Datasheet - Page 24

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IDTSTAC9751XXTAEC1XR

Manufacturer Part Number
IDTSTAC9751XXTAEC1XR
Description
IC CODEC AC'97 2CH VALUE 48-LQFP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Audio Codec '97r
Datasheet

Specifications of IDTSTAC9751XXTAEC1XR

Resolution (bits)
18 b, 20 b
Number Of Adcs / Dacs
2 / 2
Sigma Delta
Yes
S/n Ratio, Adcs / Dacs (db) Typ
85 / 89
Voltage - Supply, Analog
3.14 V ~ 3.47 V; 4.75 V ~ 5.25 V
Voltage - Supply, Digital
3.14 V ~ 3.47 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
STAC9751XXTAEC1XR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IDTSTAC9751XXTAEC1XR
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
IDT™
VALUE-LINE TWO-CHANNEL AC’97 CODECS
STAC9750/9751
VALUE-LINE TWO-CHANNEL AC’97 CODECS
5.1.1.2.
The command data port is used to deliver 16-bit control register write data in the event that the cur-
rent command port operation is a write cycle (as indicated by Slot 1, bit 19).
If the current command port operation is a read cycle, then the entire slot time must be stuffed with
0s by the AC'97 controller.
5.1.1.3.
Audio output frame slot 3 is the composite digital audio left playback stream. In a typical “Games
Compatible” PC this slot is composed of standard PCM (.wav) output samples digitally mixed (on the
AC'97 controller or host processor) with music synthesis output samples. If a sample stream of reso-
lution less than 20-bits is transferred, the AC'97 controller must stuff all trailing non-valid bit positions
within this time slot with 0s.
5.1.1.4.
Audio output frame slot 4 is the composite digital audio right playback stream. In a typical “Games
Compatible” PC this slot is composed of standard PCM (.wav) output samples digitally mixed (on the
AC'97 controller or host processor) with music synthesis output samples. If a sample stream of reso-
lution less than 20-bits is transferred, the AC'97 controller must stuff all trailing non-valid bit positions
within this time slot with 0s.
5.1.1.5.
Audio output frame slot 5 is Reserved for modem operation and is not used by the STAC9750/9751.
5.1.1.6.
Audio output frame slot 6 is the composite digital audio center stream used in a multi-channel appli-
cation where the STAC9750/9751 is programmed to accept the primary DAC PCM data from slots 6
and 9. Please refer to the register programming section for details on the multi-channel programming
options.
5.1.1.7.
Audio output frame slot 7 is the composite digital audio left surround stream. In the default state, the
STAC9750/9751 accepts PCM data from slots 7 and 8 for the surround DACs, for output to the
DAC_OUT pins. As a programming option, PCM data from slots 7 and 8 may be used to supply data
to the primary DACs when slots 6 and 9 are used to drive the surround DACs. Please refer to the
register programming section for details on the multi-channel programming options.
19:4
Bit
3:0
Slot 2: Command Data Port
Slot 3: PCM Playback Left Channel
Slot 4: PCM Playback Right Channel
Slot 5: Reserved
Slot 6: PCM Center Channel
Slot 7: PCM Left Surround Channel
Control Register Write Data
Description
Table 12. Command Data Port Bit Assignments
Reserved
24
Stuffed with 0s if current operation is a read
Stuffed with 0s
STAC9750/9751
Comments
PC AUDIO
V 5.8 103106

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