ISP1761BEUM ST-Ericsson Inc, ISP1761BEUM Datasheet - Page 80

IC USB OTG CONTROLLER HS 128LQFP

ISP1761BEUM

Manufacturer Part Number
ISP1761BEUM
Description
IC USB OTG CONTROLLER HS 128LQFP
Manufacturer
ST-Ericsson Inc
Datasheet

Specifications of ISP1761BEUM

Controller Type
USB Peripheral Controller
Interface
Serial
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
128-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Other names
568-1888-2
ISP1761BE,518
ISP1761BE-T

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISP1761BEUM
Manufacturer:
ST-Ericsson Inc
Quantity:
10 000
NXP Semiconductors
Table 74.
ISP1761_5
Product data sheet
Bit
DW3
63
62
61
60
59
58
57
56 to 44
43 to 32
DW2
31 to 24
23 to 8
7 to 0
DW1
63 to 57
56 to 50
49 to 47
46
45 to 44
43 to 42
Symbol
A
H
B
X
SC
reserved
DT
reserved
NrBytes
Transferred
[11:0]
reserved
DataStart
Address[15:0]
HubAddress
[6:0]
PortNumber
[6:0]
reserved
S
EPType[1:0]
Token[1:0]
Start and complete split for isochronous: bit description
Frame[7:0]
Access
SW — sets
HW — resets
HW — writes
HW — writes
HW — writes
SW — writes 0
HW — updates
-
HW — writes
SW — writes
-
HW — writes
-
SW — writes
SW — writes
SW — writes
SW — writes
-
SW — writes
SW — writes
SW — writes
Rev. 05 — 13 March 2008
Value Description
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Active: Write the same value as that in V.
Halt: The Halt bit is set when any microframe transfer status
has a stalled or halted condition.
Babble: This bit corresponds to bit 1 of Status0 to Status7 for
every microframe transfer status.
Transaction Error: This bit corresponds to bit 0 of Status0 to
Status7 for every microframe transfer status.
Start/Complete:
0 — Start split
1 — Complete split
-
Data Toggle: Set the Data Toggle bit to start for the PTD.
-
Number of Bytes Transferred: This field indicates the number
of bytes sent or received for this transaction.
-
Data Start Address: This is the start address for data that will
be sent or received on or from the USB bus. This is the internal
memory address and not the CPU address.
Bits 7 to 3 determine which frame to execute.
Hub Address: This indicates the hub address.
Port Number: This indicates the port number of the hub or
embedded TT.
-
Split: This bit indicates whether a split transaction has to be
executed:
0 — High-speed transaction
1 — Split transaction
Transaction type:
01 — Isochronous
Token: Token PID for this transaction:
00 — OUT
01 — IN
…continued
Hi-Speed USB OTG controller
© NXP B.V. 2008. All rights reserved.
ISP1761
79 of 163

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