LAN9211-ABZJ SMSC, LAN9211-ABZJ Datasheet - Page 142

• Manufacturer Part Number: LAN9211-ABZJ
• Description: IC ETHERNET CTLR SGL CHIP 56-QFN
• Manufacturer: SMSC
• Type: Single Chip MAC and PHY Controllerr

Specifications of LAN9211-ABZJ

• Controller Type: Ethernet Controller
• Interface: Serial EEPROM
• Voltage - Supply: 3.3V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-QFN
• Product: Ethernet Controllers
• Number Of Transceivers: 1
• Standard Supported: IEEE 802.3 or IEEE 802.3u
• Data Rate: 10 Mbps or 100 Mbps
• Supply Voltage (max): 5 V
• Supply Voltage (min): 3.3 V
• Supply Current (max): 86 mA
• Maximum Operating Temperature: + 70 C
• Ethernet Connection Type: 100BASE-TX or 10BASE-T
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• No. Of Ports: 2
• Ethernet Type: IEEE 802.3 / 802.3u
• Interface Type: HBI
• Supply Current: 86mA
• Supply Voltage Range: 2.97V To 3.63V
• Operating Temperature Range: 0°C To +70°C
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 638-1049-6

Revision 2.7 (03-15-10)
ICLK Input Buffer
Low Input Level
High Input Level
Peak Differential Output Voltage
High
Peak Differential Output Voltage
Low
Signal Amplitude Symmetry
Signal Rise & Fall Time
Rise & Fall Time Symmetry
Duty Cycle Distortion
Overshoot & Undershoot
Jitter
Transmitter Peak Differential
Output Voltage
Receiver Differential Squelch
Threshold
PARAMETER
PARAMETER
PARAMETER
Note 7.5
Note 7.6
Note 7.7
Note 7.8
Note 7.9
Note 7.10 Min/Max voltages guaranteed as measured with 100Ω resistive load.
This specification applies to all inputs and tri-stated bi-directional pins. Internal pull-down
and pull-up resistors add +/- 50uA per-pin (typical).
This is the total V
the number of pins driven to V
are driven to the maximum operational limit for V
maximum input leakage current divided by 10.
Measured at the line side of the transformer, line replaced by 100Ω (+/- 1%) resistor.
Offset from16 nS pulse width at 50% of pulse peak
Measured differentially.
Table 7.5 100BASE-TX Transceiver Characteristics
SYMBOL
Table 7.6 10BASE-T Transceiver Characteristics
Table 7.4 I/O Buffer Characteristics (continued)
V
V
IHCK
ILCK
SYMBOL
SYMBOL
V
V
V
T
D
V
V
T
V
PPH
RFS
OUT
PPL
OS
SS
RF
CD
DS
IN
input leakage for the entire device. This value should be divided by
MIN
-0.3
1.4
DATASHEET
High-Performance Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX Support
-950
MIN
950
MIN
300
3.0
2.2
98
35
-
-
IN
142
TYP
MAX to calculate per-pin leakage. For example, if 10 pins
TYP
TYP
420
2.5
50
-
-
-
-
-
-
MAX
0.5
3.6
-1050
MAX
1050
MAX
102
585
5.0
0.5
1.4
2.8
65
5
IN
, the per-pin input leakage is the
UNITS
UNITS
mVpk
mVpk
UNITS
mV
nS
nS
nS
%
%
%
V
V
V
Note 7.10
Note 7.7
Note 7.7
Note 7.7
Note 7.7
Note 7.7
Note 7.8
Note 7.9
NOTES
NOTES
NOTES
SMSC LAN9211
Datasheet