LAN9211-ABZJ SMSC, LAN9211-ABZJ Datasheet - Page 58

IC ETHERNET CTLR SGL CHIP 56-QFN

LAN9211-ABZJ

Manufacturer Part Number
LAN9211-ABZJ
Description
IC ETHERNET CTLR SGL CHIP 56-QFN
Manufacturer
SMSC
Type
Single Chip MAC and PHY Controllerr
Datasheet

Specifications of LAN9211-ABZJ

Controller Type
Ethernet Controller
Interface
Serial EEPROM
Voltage - Supply
3.3V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
56-QFN
Product
Ethernet Controllers
Number Of Transceivers
1
Standard Supported
IEEE 802.3 or IEEE 802.3u
Data Rate
10 Mbps or 100 Mbps
Supply Voltage (max)
5 V
Supply Voltage (min)
3.3 V
Supply Current (max)
86 mA
Maximum Operating Temperature
+ 70 C
Ethernet Connection Type
100BASE-TX or 10BASE-T
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
No. Of Ports
2
Ethernet Type
IEEE 802.3 / 802.3u
Interface Type
HBI
Supply Current
86mA
Supply Voltage Range
2.97V To 3.63V
Operating Temperature Range
0°C To +70°C
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
638-1049-6

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LAN9211-ABZJ
Manufacturer:
Standard
Quantity:
3
Part Number:
LAN9211-ABZJ
Manufacturer:
SMSC
Quantity:
1 154
Part Number:
LAN9211-ABZJ
Manufacturer:
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Quantity:
20 000
Revision 2.7 (03-15-10)
3.12.6.3
TX Example 3
In this example a single, 111-Byte Ethernet packet will be transmitted with a TX checksum. This packet
is divided into four buffers. The four buffers are as follows:
Buffer 0:
Buffer 1:
Buffer 2:
Buffer 3:
Figure 3.15, "TX Example 1"
how data is passed to the TX data FIFO.
Note: In order to perform a TX checksum calculation on the associated packet, bit 14 (CK) of the TX
4-Byte “Data Start Offset”
4-Byte Checksum Preamble
16-Byte “Buffer End Alignment”
7-Byte “Data Start Offset”
79-Bytes of payload data
16-Byte “Buffer End Alignment”
0-Byte “Data Start Offset”
15-Bytes of payload data
16-Byte “Buffer End Alignment”
10-Byte “Data Start Offset”
17-Bytes of payload data
16-Byte “Buffer End Alignment”
Command ‘B’ must be set in conjunction with bit 13 (FS) of TX Command ‘A’ and bit 16
(TXCOE_EN) of the COE_CR register. For more information, refer to
Checksum Offload Engine
illustrates the TX command structure for this example, and also shows
(TXCOE)".
DATASHEET
High-Performance Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX Support
58
Section 3.6.2, "Transmit
SMSC LAN9211
Datasheet

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