SC18IS601IBS,151 NXP Semiconductors, SC18IS601IBS,151 Datasheet - Page 20

• Manufacturer Part Number: SC18IS601IBS,151
• Description: IC SPI TO I2C BUS 24-HVQFN
• Manufacturer: NXP Semiconductors

Specifications of SC18IS601IBS,151

• Package / Case: 24-VQFN Exposed Pad, 24-HVQFN, 24-SQFN, 24-DHVQFN
• Controller Type: I²C Bus Controller
• Interface: SPI
• Voltage - Supply: 2.4 V ~ 3.6 V
• Current - Supply: 11mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Maximum Operating Frequency: 12 MHz
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.4 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 568-3511 - DEMO BOARD SPI TO I2C
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4710; 935286979151; SC18IS601IBS-S

NXP Semiconductors
Table 13.
V
[1]
[2]
SC18IS600_601_5
Product data sheet
Symbol
f
External clock input (SC18IS601); see
f
T
t
t
t
t
Glitch filter
t
t
SPI slave interface
f
T
t
t
t
t
t
t
t
t
t
t
t
t
osc(RC)
osc
CHCX
CLCX
CLCH
CHCL
gr
sa
SPI
SPILEAD
SPILAG
SCLKH
SCLKL
SPIDSU
SPIDH
SPIA
SPIDIS
SPIDV
SPIOH
SPIR
SPIF
DD
CLCL
SPICYC
= 3.0 V to 3.6 V; T
Parameters are valid over operating temperature range unless otherwise specified. Parts are tested to 2 MHz, but are guaranteed to
operate down to 0 Hz.
SCL and SDA do not have glitch suppression circuits.
Parameter
internal RC oscillator
frequency
oscillator frequency
clock cycle time
clock HIGH time
clock LOW time
clock rise time
clock fall time
glitch rejection time
signal acceptance time
SPI operating frequency
SPI cycle time
SPI enable lead time
SPI enable lag time
SCLK HIGH time
SCLK LOW time
SPI data set-up time
SPI data hold time
SPI access time
SPI disable time
SPI enable to output data
valid time
SPI output data hold time
SPI rise time
SPI fall time
Dynamic characteristics
amb
= 40 C to +85 C (industrial); unless otherwise specified.
Conditions
SC18IS600;
nominal f = 7.3728 MHz;
trimmed to 1 % at
T
RESET pin
any pin except RESET
RESET pin
any pin except RESET
3.0 MHz
3.0 MHz
3.0 MHz
3.0 MHz
3.0 MHz
3.0 MHz
SPI outputs (SCLK,
MOSI, MISO)
SPI inputs (SCLK, MOSI,
MISO, CS)
SPI outputs (SCLK,
MOSI, MISO)
SPI inputs (SCLK, MOSI,
MISO, CS)
Figure 23
amb
= 25 C
Rev. 05 — 28 July 2008
[2]
[2]
7.189
6
3
3
Min
125
100
100
55
22
22
50
fosc
fosc
fosc
0
0
4
4
0
0
0
0
-
-
-
-
-
-
-
-
Variable clock
T
T
CLCL
CLCL
[1]
7.557
2000
2000
Max
fosc
160
160
100
100
18
50
15
80
SC18IS600/601
5
5
-
-
-
-
-
-
-
-
-
-
-
6
t
t
CHCX
CLCX
SPI to I
7.189
f
Min
125
333
167
167
100
100
osc
22
22
50
0
4
4
0
0
-
-
-
-
-
-
-
-
-
-
-
-
© NXP B.V. 2008. All rights reserved.
= 18 MHz
2
C-bus interface
7.557
2000
2000
Max
160
160
100
100
50
15
80
5
5
3
-
-
-
-
-
-
-
-
-
-
-
-
-
-
20 of 30
Unit
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
s
s