DS31256 Maxim Integrated Products, DS31256 Datasheet - Page 39

• Manufacturer Part Number: DS31256
• Description: IC CTRLR HDLC 256-CHANNEL 256BGA
• Manufacturer: Maxim Integrated Products

Specifications of DS31256

• Controller Type: HDLC Controller
• Interface: Serial
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 500mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Bit 15/Status Bit for Local Bus Interrupt (LBINT)
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Note: Bits that are underlined are read-only; all other bits are read-write.
Bits 0 to 15/Status Bits for Change of State in Receive V.54 Loopback Detector (SLBP0 to SLBP15). These
status bits are set to 1 when the V.54 loopback detector within the port has either timed out in its search for the
loop-up pattern or it has detected and validated the loop-up or loop-down pattern. There is one status bit per port.
The host must read the VTO and VLB status bits in RP[n]CR register of the corresponding port to determine the
exact status of the V.54 detector. If the V.54 detector has timed out in its search for the loop-up code (VTO = 1),
then SLBP is continuously set until the host resets the V.54 detector by toggling the VRST bit in RP[n]CR. If
enabled through the SLBP[n] bit in the interrupt mask for SV54 (ISV54), the setting of these bits causes a
hardware interrupt at the PCI bus through the PINTA signal pin and also at the LINT if the local bus is in
configuration mode. See Section
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Note: Bits that are underlined are read-only; all other bits are read-write.
Bits 0 to 15/Status Bit for Change of State in Receive V.54 Loopback Detector (SLBP0 to SLBP15)
0 = interrupt masked
1 = interrupt unmasked
0 = interrupt masked
1 = interrupt unmasked
SLBP15
SLBP15
SLBP7
SLBP7
15
15
7
0
0
7
0
0
SV54
Status Register for the Receive V.54 Detector
0030h
ISV54
Interrupt Mask Register for SV54
0034h
SLBP14
SLBP14
SLBP6
SLBP6
14
14
6
0
0
6
0
0
6
for specific details about the operation of the V.54 loopback detector.
SLBP13
SLBP13
SLBP5
SLBP5
13
13
5
0
0
5
0
0
SLBP12
SLBP12
SLBP4
SLBP4
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12
12
4
0
0
4
0
0
SLBP11
SLBP11
SLBP3
SLBP3
11
11
3
0
0
3
0
0
SLBP10
SLBP10
SLBP2
SLBP2
10
10
2
0
0
2
0
0
SLBP1
SLBP9
SLBP1
SLBP9
1
0
9
0
1
0
9
0
SLBP0
SLBP8
SLBP0
SLBP8
0
0
8
0
0
0
8
0