ML2003IQ Fairchild Semiconductor, ML2003IQ Datasheet
ML2003IQ
Specifications of ML2003IQ
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ML2003IQ Summary of contents
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ML2003, ML2004 Logarithmic Gain/Attenuator Features • Low noise: 0 dBrnc max with +24dB gain • Low harmonic distortion: -60dB max • Gain range: –24 to +24dB • Resolution: 0.1dB steps • Flat frequency response: ±0.05dB from .3–4 kHz ±0.10dB from ...
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ML2003, ML2004 Pin Description Name C3 In serial mode, pin is unused. In parallel mode, coarse gain select bit. Pin has internal pulldown resistor to GND. (LATI serial mode, input latch clock which loads the data from the ...
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PRODUCT SPECIFICATION Operating Conditions Parameter 2 Temperature Range ML2003CX, ML2004CX ML2003IX, ML2004IX Supply Voltage Electrical Characteristics Unless otherwise specifi MIN Other Bits = 0(0dB Ideal Gain 100pF reference ...
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ML2003, ML2004 Electrical Characteristics Unless otherwise specifi MIN Other Bits = 0(0dB Ideal Gain 100pF reference load, digital timing measured at 1 Symbol Parameter Notes V Digital Output High OH ...
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PRODUCT SPECIFICATION Timing Diagram SCK SID SOD SCK LATI LATO SOD TIMING PARAMETERS ARE REFERENCED TO THE 1.4 VOLT MIDPOINT. Typical Performance Curves 0 -0.5 ATTEN 0.5V IN RMS GAIN 0.5V /GAIN SETTING IN RMS -0.10 ...
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ML2003, ML2004 Typical Performance Curves 2.0 1.8 1.6 1.4 GAIN = +24dB 1.2 GAIN = +12dB GAIN = -24dB 1 0.8 0.6 0.4 0 100 FREQUENCY (Hz) Figure 4. Output Noise Voltage vs Frequency 100 ATTEN ...
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PRODUCT SPECIFICATION Functional Description The ML2003 consists of a coarse gain stage, a fine gain stage, an output buffer, and a serial/parallel digital interface. Gain Stages The analog input goes directly into the op amp input in IN ...
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ML2003, ML2004 Table 2. Coarse Gain Settings (F3- Ideal Gain (dB ATTEN/GAIN = 1 ATTEN/GAIN = -1 -3 ...
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PRODUCT SPECIFICATION ATTEN/GAIN 8 MSB Applications ML2004 LOG GAIN/ATTEN OUT IN µP Figure 12. Typical Serial Interface ML2004 V IN µP Figure 14. Controlling Multiple ML2004 with Only 3 Digital Lines Using One Long Data Word ...
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ML2003, ML2004 ML2003 OUT ATTEN/GAIN C3-C0 F3-F1 UP/DOWN U/D COMPARATOR 8-BIT COUNTER CLOCK R R1, R2, R3 SETS AGC THRESHOLD Figure 16. Analog AGC V REF CLK1 f CLK1 DETERMINES PEAK ACQUIRE TIME f CLK2 DETERMINES PEAK ...
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... ML2003, ML2004 Ordering Information Part Number ML2003IQ ML2003CP ML2003CQ ML2004IP ML2004CP DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; ...