PIC18F4550-I/P Microchip Technology Inc., PIC18F4550-I/P Datasheet - Page 72

• Manufacturer Part Number: PIC18F4550-I/P
• Description: 40 PIN, 32 KB FLASH, 2048 RAM, FS-USB 2.0
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F4550-I/P

• A/d Inputs: 13-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 12 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 34
• Interface: I2C/SPI/UART/USART/USB
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 40-pin PDIP
• Programmable Memory: 32K Bytes
• Ram Size: 2K Bytes
• Speed: 48 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC18F2455/2550/4455/4550
TABLE 5-2:
DS39632C-page 70
UCFG
UADDR
UCON
USTAT
UEIE
UEIR
UIE
UIR
UFRMH
UFRML
SPPCON
SPPEPS
SPPCFG
SPPDATA
Legend:
Note
File Name
1:
2:
3:
4:
5:
6:
7:
(3)
(3)
(3)
(3)
x = unknown, u = unchanged, - = unimplemented, q = value depends on condition. Shaded cells are unimplemented, read as ‘0’.
Bit 21 of the TBLPTRU allows access to the device Configuration bits.
The SBOREN bit is only available when BOREN<1:0> = 01; otherwise, the bit reads as ‘0’.
These registers and/or bits are not implemented on 28-pin devices and are read as ‘0’. Reset values are shown for 40/44-pin devices;
individual unimplemented bits should be interpreted as ‘-’.
RA6 is configured as a port pin based on various primary oscillator modes. When the port pin is disabled, all of the associated bits read ‘0’.
RE3 is only available as a port pin when the MCLRE Configuration bit is clear; otherwise, the bit reads as ‘0’.
RC5 and RC4 are only available as port pins when the USB module is disabled (UCON<3> = 0).
I
2
C Slave mode only.
CLKCFG1
UTEYE
RDSPP
BTSEE
BTSEF
DATA7
FRM7
Bit 7
—
—
—
—
—
—
—
REGISTER FILE SUMMARY (PIC18F2455/2550/4455/4550) (CONTINUED)
CLKCFG0
UOEMON
PPBRST
WRSPP
ADDR6
ENDP3
SOFIE
DATA6
SOFIF
FRM6
Bit 6
—
—
—
—
STALLIE
STALLIF
ADDR5
ENDP2
DATA5
FRM5
CSEN
Bit 5
SE0
—
—
—
—
—
—
SPPBUSY
CLK1EN
PKTDIS
UPUEN
ADDR4
BTOEE
ENDP1
BTOEF
IDLEIE
IDLEIF
DATA4
FRM4
Bit 4
—
—
Preliminary
DFN8EE
DFN8EF
UTRDIS
ADDR3
USBEN
ADDR3
ENDP0
DATA3
TRNIE
TRNIF
FRM3
Bit 3
WS3
—
—
CRC16EE
CRC16EF
RESUME
ACTVIE
ADDR2
ACTVIF
ADDR2
FRM10
DATA2
FRM2
FSEN
Bit 2
WS2
DIR
—
SPPOWN
SUSPND
CRC5EE
CRC5EF
UERRIE
UERRIF
ADDR1
ADDR1
DATA1
FRM9
FRM1
PPB1
PPBI
Bit 1
WS1
© 2006 Microchip Technology Inc.
URSTIE
URSTIF
ADDR0
SPPEN
ADDR0
PIDEE
PIDEF
DATA0
FRM8
FRM0
PPB0
Bit 0
WS0
—
—
00-0 0000
-000 0000
-0x0 000-
-xxx xxx-
0--0 0000
0--0 0000
-000 0000
-000 0000
---- -xxx
xxxx xxxx
---- --00
00-0 0000
0000 0000
0000 0000
POR, BOR
Value on
on page
55, 166
55, 170
55, 164
55, 168
55, 182
55, 181
55, 180
55, 178
55, 170
55, 170
55, 187
55, 191
55, 188
55, 192
Details