IDT82V2088BBG IDT, Integrated Device Technology Inc, IDT82V2088BBG Datasheet - Page 21

IC LINE INTERFACE UNIT 208-PBGA

IDT82V2088BBG

Manufacturer Part Number
IDT82V2088BBG
Description
IC LINE INTERFACE UNIT 208-PBGA
Manufacturer
IDT, Integrated Device Technology Inc
Type
Line Interface Units (LIUs)r
Datasheet

Specifications of IDT82V2088BBG

Protocol
E1
Voltage - Supply
3.13 V ~ 3.47 V
Mounting Type
Surface Mount
Package / Case
208-PBGA
Screening Level
Industrial
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Drivers/receivers
-
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
Other names
800-1705
82V2088BBG

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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT
3.2.4
impedance matching can be realized by the internal impedance matching
circuit or the external impedance matching circuit. If T_TERM[2] is set to
‘0’, the internal impedance matching circuit will be selected. In this case,
the T_TERM[1:0] bits (TERM, 1AH...) can be set to choose 75 Ω, 100 Ω,
110 Ω or 120 Ω internal impedance of TTIPn/TRINGn. If T_TERM[2] is set
to ‘1’, the internal impedance matching circuit will be disabled. In this case,
the external impedance matching circuit will be used to realize the imped-
ance matching. For T1/J1 mode, the external impedance matching circuit
for the transmitter is not supported.
components to connect with the cable for one channel.
Table-14 Impedance Matching for Transmitter
3.2.5
T_OFF bit (TCF0, 02H...) to ‘1’. In this case, the TTIPn/TRINGn pins are
turned into high impedance.
The transmit line interface consists of TTIPn pin and TRINGn pin. The
Note: The precision of the resistors should be better than ± 1%
The transmit path can be powered down individually by setting the
Cable Configuration
TRANSMIT PATH LINE INTERFACE
TRANSMIT PATH POWER DOWN
T1/133~266 ft
T1/266~399 ft
T1/399~533 ft
T1/533~655 ft
-15.0 dB LBO
-22.5 dB LBO
-7.5 dB LBO
T1/0~133 ft
J1/0~655 ft
E1/120 Ω
0 dB LBO
E1/75 Ω
Figure-9
T_TERM[2:0]
000
001
010
010
shows the appropriate external
011
Internal Termination
Table-14
PULS[3:0]
0000
0001
0010
0011
0100
0101
0110
1000
1001
1010
1011
0111
is the list
21
of the recommended impedance matching for transmitter.
ing THZ pin to high or individually by setting the THZ bit (TCF1, 03H...) to
‘1’. In this state, the internal transmit circuits are still active.
impedance:
0 Ω
R
The TTIPn/TRINGn can be turned into high impedance globally by pull-
Besides, in the following cases, TTIPn/TRINGn will also become high
T
Loss of MCLK: all TTIPn/TRINGn pins become high impedance;·
Loss of TCLKn: corresponding TTIPn/TRINGn become HZ (excep-
tions: Remote Loopback; Transmit internal pattern by MCLK);
Transmit path power down;
After software reset; pin reset and power on.
T_TERM[2:0]
1XX
-
External Termination
PULS[3:0]
0001
0001
-
TEMPERATURE RANGES
INDUSTRIAL
9.4 Ω
R
-
T

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