PSB3186FV14XT Infineon Technologies, PSB3186FV14XT Datasheet - Page 20
PSB3186FV14XT
Manufacturer Part Number
PSB3186FV14XT
Description
Manufacturer
Infineon Technologies
Datasheet
1.PSB3186FV14XT.pdf
(200 pages)
Specifications of PSB3186FV14XT
Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
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Table 2
Pin No.
MQFP-64
TQFP-64
Host Interface
19
20
21
22
23
24
25
26
9
10
11
12
13
14
Data Sheet
Symbol
A0
A1
A2
A3
A4
A5
A6
A7
AD0
AD1
AD2
AD3
AD4
AD5
SCL
ISAC-SX TE Pin Definitions and Functions
Input (I)
Output (O)
Open Drain
(OD)
I
I
I
I
I
I
I
I
I/O
I/O
I/O
I/O
I/O
I/O
I
Function
• Non-Multiplexed Bus Mode:
Address Bus
Address bus transfers addresses from the
microcontroller to the ISAC-SX TE. For indirect
address mode only A0 is valid (A1-A7 to be
connected to VDD).
• Multiplexed Bus Mode:
Not used in multiplexed bus mode. In this case
A0-A7 should directly be connected to VDD.
• Multiplexed Bus Mode:
Address/data bus
Transfers addresses from the microcontroller to the
ISAC-SX TE and data between the microcontroller
and the ISAC-SX TE.
• Non-Multiplexed Bus Mode:
Data bus
Transfers data between the microcontroller and the
ISAC-SX TE.
• Multiplexed Bus Mode:
Address/data bus
Address/data line AD5 if the parallel interface is
selected.
• Non-Multiplexed Bus Mode:
Data bus
Data line D5 if the parallel interface is selected.
SCI - Serial Clock
Clock signal of the SCI interface if a serial interface
is selected.
20
Pin Configuration
ISAC-SX TE
PSB 3186
2003-01-30
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