PSB21150FV14NP Infineon Technologies, PSB21150FV14NP Datasheet - Page 28
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PSB21150FV14NP
Manufacturer Part Number
PSB21150FV14NP
Description
Manufacturer
Infineon Technologies
Datasheet
1.PSB21150FV14NP.pdf
(270 pages)
Specifications of PSB21150FV14NP
Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Not Compliant
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Table 2
Pin No.
MQFP-64
TQFP-64
49
51
50
29
28
Auxiliary Interface
30
31
32
64
Data Sheet
Symbol Input (I)
BCL/
SCLK
DD
DU
SDS1
SDS2
AUX0
AUX1
AUX2
AUX3
IPAC-X Pin Definitions and Functions (cont’d)
Output (O)
Open Drain
(OD)
O
I/O (OD)
I/O (OD)
O
O
I/O (OD)
I/O (OD)
I/O (OD)
I/O (OD)
Function
Bit Clock/S-Clock
TE-Mode:
Bit clock output, identical to IOM-2 data rate (DCL/
2).
LT-T Mode:
1.536 MHz output synchronous to S-interface.
NT / LT-S Mode:
Bit clock output derived from the DCL input clock
divided by 2.
Data Downstream
IOM-2 data signal in downstream direction.
Data Upstream
IOM-2 data signal in upstream direction.
Serial Data Strobe 1
Programmable strobe signal for time slot and/or D-
channel indication on IOM-2.
Serial Data Strobe 2
Programmable strobe signal for time slot and/or D-
channel indication on IOM-2.
• TE-Mode:
Auxiliary Port 0 - 2 (input/output)
These pins are individually programmable as
general input/output. The state of the pin can be
read from (input) / written to (output) a register.
• LT-T/LT-S/NT Mode:
CH0-2 - IOM-2 Channel Select (input)
These pins select one of eight channels on the IOM-
2 interface.
Auxiliary Port 3 (input/output)
This pin is programmable as general input/output.
The state of the pin can be read from (input) / written
to (output) a register.
28
Pin Configuration
PSB/PSF 21150
2003-01-30
IPAC-X
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