PSB21150FV14NT Infineon Technologies, PSB21150FV14NT Datasheet - Page 109
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PSB21150FV14NT
Manufacturer Part Number
PSB21150FV14NT
Description
Manufacturer
Infineon Technologies
Datasheet
1.PSB21150FV14NT.pdf
(270 pages)
Specifications of PSB21150FV14NT
Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Not Compliant
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Example:
w CDA1_CR = 00
w CDA10 = 5A
r CDA10 = FF
w CDA1_CR = 02
r CDA10 = 5A
3.7.1.2
IOM-2 Interface
The IOM handler of the IPAC-X provides a flexible access of the B-channel HDLC
controllers to the timeslots on IOM-2 which may be used for IDSL applications.
One of the two B-channel HDCL controllers is programmed to transparent mode and its
FIFO is programmed to certain timeslot on IOM-2, while the second B-channel controller
and the D-channel controller is unused
.
Figure 59
This B-channel HDLC controller is assigned to three timeslots on IOM-2, which are two
8-bit timeslots and one 2-bit timeslot. For each of the 3 timeslots the timeslot position
(timeslot number) and data port (DU, DD) can individually be selected. Additionally, each
of the 3 timeslots can individually be enabled/disabled so any combination of the 3
Data Sheet
B-channel
HDLC 1
TX/RX FIFOs
Timeslot assignement of FIFO data to IOM-2
timeslots (described in this chapter)
IDSL Support
H
H
Timeslot Assignment on IOM-2
H
(old value of previous programming)
(the programmed value can be read back)
(example)
H
H
(inputs and outputs are disabled)
(output of CDA10 is enabled)
B-channel
HDLC 2
TX/RX FIFOs
Host
IOM-2 Interface
D-channel
HDLC
TX/RX FIFOs
(Figure
109
59)
Description of Functional Blocks
S transceiver
PSB/PSF 21150
S
2003-01-30
IPAC-X
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