ADV7343BSTZ Analog Devices Inc, ADV7343BSTZ Datasheet - Page 101

IC ENCODER VIDEO W/DAC 64-LQFP

ADV7343BSTZ

Manufacturer Part Number
ADV7343BSTZ
Description
IC ENCODER VIDEO W/DAC 64-LQFP
Manufacturer
Analog Devices Inc
Type
Video Encoderr
Datasheet

Specifications of ADV7343BSTZ

Applications
DVD, Blu-Ray
Voltage - Supply, Analog
3.3V
Voltage - Supply, Digital
1.8V
Mounting Type
Surface Mount
Package / Case
64-LQFP
Supply Voltage Range
1.71V To 1.89V
Operating Temperature Range
-40°C To +85°C
Tv / Video Case Style
LQFP
No. Of Pins
64
Svhc
No SVHC (18-Jun-2010)
Operating Temperature Max
85°C
Operating
RoHS Compliant
Input Format
Digital
Output Format
Analogue
Dac Resolution
11bit
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Table 121. 24-Bit 720p YCrCb In (EAV/SAV), YPrPb Out
Subaddress
0x17
0x00
0x01
0x30
0x31
0x33
Table 122. 24-Bit 720p YCrCb In, YPrPb Out
Subaddress
0x17
0x00
0x01
0x30
0x31
0x33
Table 123. 24-Bit 720p YCrCb In (EAV/SAV), RGB Out
Subaddress
0x17
0x00
0x01
0x02
0x30
0x31
0x33
Table 124. 24-Bit 720p YCrCb In, RGB Out
Subaddress
0x17
0x00
0x01
0x02
0x30
0x31
0x33
Setting
0x02
0x1C
0x10
0x2C
0x01
0x28
Setting
0x02
0x1C
0x10
0x28
0x01
0x28
Setting
0x02
0x1C
0x10
0x10
0x2C
0x01
0x28
Setting
0x02
0x1C
0x10
0x10
0x28
0x01
0x28
Description
Software reset.
All DACs enabled. PLL enabled (4×).
HD-SDR input mode.
720p at 60 Hz/59.94 Hz. EAV/SAV syn-
chronization. EIA-770.3 output levels.
Pixel data valid. 4× oversampling.
4:4:4 input data.
Description
Software reset.
All DACs enabled. PLL enabled (4×).
HD-SDR input mode.
720p at 60 Hz/59.94 Hz. HSYNC/VSYNC
synchronization. EIA-770.3 output levels.
Pixel data valid. 4× oversampling.
4:4:4 input data.
Description
Software reset.
All DACs enabled. PLL enabled (4×).
HD-SDR input mode.
RGB output enabled. RGB output sync
enabled.
720p at 60 Hz/59.94 Hz. EAV/SAV syn-
chronization. EIA-770.3 output levels.
Pixel data valid. 4× oversampling.
4:4:4 input data.
Description
Software reset.
All DACs enabled. PLL enabled (4×).
HD-SDR input mode.
RGB output enabled. RGB output sync
enabled.
720p at 60 Hz/59.94 Hz. HSYNC/VSYNC
synchronization. EIA-770.3 output levels.
Pixel data valid. 4× oversampling.
4:4:4 input data.
Rev. A | Page 101 of 104
Table 125. 24-Bit 720p RGB In, RGB Out
Subaddress
0x17
0x00
0x01
0x02
0x30
0x31
0x33
0x35
Table 126. 8-Bit 1080i YCrCb In (EAV/SAV), YPrPb Out
Subaddress
0x17
0x00
0x01
0x30
0x31
Table 127. 8-Bit 1080i YCrCb In, YPrPb Out
Subaddress
0x17
0x00
0x01
0x30
0x31
Table 128. 8-Bit 1080i YCrCb In (EAV/SAV), RGB Out
Subaddress
0x17
0x00
0x01
0x02
0x30
0x31
Setting
0x02
0x1C
0x10
0x10
0x28
0x01
0x28
0x02
Setting
0x02
0x1C
0x20
0x6C
0x01
Setting
0x02
0x1C
0x20
0x68
0x01
Setting
0x02
0x1C
0x20
0x10
0x6C
0x01
Description
Software reset.
All DACs enabled. PLL enabled (4×).
HD-SDR input mode.
RGB output enabled. RGB output sync
enabled.
720p at 60 Hz/59.94 Hz. HSYNC/VSYNC
synchronization. EIA-770.3 output levels.
Pixel data valid. 4× oversampling.
4:4:4 input data.
RGB input enabled.
Description
Software reset.
All DACs enabled. PLL enabled (4×).
HD-DDR input mode. Luma data
clocked on falling edge of CLKIN.
1080i at 30 Hz/29.97 Hz. EAV/SAV syn-
chronization. EIA-770.3 output levels.
Pixel data valid. 4× oversampling.
Description
Software reset.
All DACs enabled. PLL enabled (4×).
HD-DDR input mode. Luma data
clocked on falling edge of CLKIN.
1080i at 30 Hz/29.97 Hz. HSYNC/
VSYNC synchronization. EIA-770.3
output levels.
Pixel data valid. 4× oversampling.
Description
Software reset.
All DACs enabled. PLL enabled (4×).
HD-DDR input mode. Luma data
clocked on falling edge of CLKIN.
RGB output enabled. RGB output sync
enabled.
1080i at 30 Hz/29.97 Hz. HSYNC/
VSYNC synchronization. EIA-770.3
output levels.
Pixel data valid. 4× oversampling.
ADV7342/ADV7343

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