ADV7343BSTZ Analog Devices Inc, ADV7343BSTZ Datasheet - Page 32

IC ENCODER VIDEO W/DAC 64-LQFP

ADV7343BSTZ

Manufacturer Part Number
ADV7343BSTZ
Description
IC ENCODER VIDEO W/DAC 64-LQFP
Manufacturer
Analog Devices Inc
Type
Video Encoderr
Datasheet

Specifications of ADV7343BSTZ

Applications
DVD, Blu-Ray
Voltage - Supply, Analog
3.3V
Voltage - Supply, Digital
1.8V
Mounting Type
Surface Mount
Package / Case
64-LQFP
Supply Voltage Range
1.71V To 1.89V
Operating Temperature Range
-40°C To +85°C
Tv / Video Case Style
LQFP
No. Of Pins
64
Svhc
No SVHC (18-Jun-2010)
Operating Temperature Max
85°C
Operating
RoHS Compliant
Input Format
Digital
Output Format
Analogue
Dac Resolution
11bit
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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ADV7342/ADV7343
SR7 to
SR0
0x17
1
Table 21. Register 0x30
SR7 to
SR0
0x30
1
2 See the HD Interlace External P_HSYNC and P_VSYNC Considerations section for more information.
x = Logic 0 or Logic 1.
Synchronization can be controlled with a combination of either HSYNC and VSYNC inputs or HSYNC and field inputs, depending on Subaddress 0x34, Bit 6.
Register
ED/HD Mode
Register 1
Register
Software reset
Bit Description
ED/HD output standard
ED/HD input
synchronization format
ED/HD standard
2
7
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
Bit Description
Reserved
Software reset
Reserved
10011–11111
6
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
5
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
Bit Number
Rev. A | Page 32 of 104
4
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
3
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
7
0
2
0
1
6
0
1
0
0
1
1
5
0
Bit Number
0
0
1
0
1
4
0
Register Setting
EIA770.2 output
EIA770.3 output
EIA770.1 output
Output levels for full
input range
Reserved
External HSYNC , VSYNC
and field inputs
Embedded EAV/SAV
codes
SMPTE 293M,
ITU-BT.1358
Nonstandard timing mode
BTA-1004, ITU-BT.1362
ITU-BT.1358
ITU-BT.1362
SMPTE 296M-1,
SMPTE 274M-2
SMPTE 296M-3
SMPTE 296M-4,
SMPTE 274M-5
SMPTE 296M-6
SMPTE 296M-7,
SMPTE 296M-8
SMPTE 240M
Reserved
Reserved
SMPTE 274M-4,
SMPTE 274M-5
SMPTE 274M-6
SMPTE 274M-7,
SMPTE 274M-8
SMPTE 274M-9
SMPTE 274M-10,
SMPTE 274M-11
ITU-R BT.709-5
Reserved
3
0
1
2
0
1
0
1
1
0
0
Register Setting
Writing a 1 resets the device;
this is a self-clearing bit.
Note
ED
HD
525p at 59.94 Hz
525p at 59.94 Hz
625p at 50 Hz
625p at 50 Hz
720p at 60/59.94 Hz
720p at 50 Hz
720p at 30/29.97 Hz
720p at 25 Hz
720p at 24/23.98 Hz
1035i at 60/59.94 Hz
1080i at 30/29.97 Hz
1080i at 25 Hz
1080p at 30/29.97 Hz
1080p at 25 Hz
1080p at 24/23.98 Hz
1080Psf at 24 Hz
Reset
Value
0x00
Reset
Value
0x00

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