PCA9554AD,112 NXP Semiconductors, PCA9554AD,112 Datasheet - Page 14

• Manufacturer Part Number: PCA9554AD,112
• Description: IC I/O EXPANDER I2C 8B 16SOIC
• Manufacturer: NXP Semiconductors

Specifications of PCA9554AD,112

• Package / Case: 16-SOIC (0.300", 7.5mm Width)
• Interface: I²C, SMBus
• Number Of I /o: 8
• Interrupt Output: Yes
• Frequency - Clock: 400kHz
• Voltage - Supply: 2.3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Includes: POR
• Logic Family: PCA
• Number Of Lines (input / Output): 8
• Operating Supply Voltage: 2.3 V to 5.5 V
• Power Dissipation: 200 mW
• Operating Temperature Range: - 40 C to + 85 C
• Maximum Clock Frequency: 400 KHz
• Mounting Style: SMD/SMT
• Number Of Output Lines: 8
• Output Current: 50 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: OM6285 - EVAL BOARD I2C-2002-1A568-4002 - DEMO BOARD I2C
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-1051-5; 935269195112; PCA9554AD

NXP Semiconductors
Table 9.
V
[1]
[2]
[3]
10. Dynamic characteristics
Table 10.
[1]
[2]
[3]
PCA9554_9554A_7
Product data sheet
Symbol
Select inputs A0, A1, A2
V
V
I
Symbol
f
t
t
t
t
t
t
t
t
t
t
t
t
t
Port timing
t
t
t
Interrupt timing
t
t
LI
SCL
BUF
HD;STA
SU;STA
SU;STO
HD;DAT
VD:ACK
VD;DAT
SU;DAT
LOW
HIGH
r
f
SP
v(Q)
su(D)
h(D)
v(INT_N)
rst(INT_N)
DD
IL
IH
= 2.3 V to 5.5 V; V
V
Each I/O must be externally limited to a maximum of 25 mA and the device must be limited to a maximum current of 100 mA.
The total current sourced by all I/Os must be limited to 85 mA.
t
t
C
VD;ACK
VD;DAT
DD
b
= total capacitance of one bus line in pF.
must be lowered to 0.2 V in order to reset part.
= minimum time for SDA data output to be valid following SCL LOW.
= time for Acknowledgement signal from SCL LOW to SDA (out) LOW.
Parameter
LOW-level input voltage
HIGH-level input voltage
input leakage current
Static characteristics
Dynamic characteristics
Parameter
SCL clock frequency
bus free time between a STOP and
START condition
hold time (repeated) START condition
set-up time for a repeated START
condition
set-up time for STOP condition
data hold time
data valid acknowledge time
data valid time
data set-up time
LOW period of the SCL clock
HIGH period of the SCL clock
rise time of both SDA and SCL signals
fall time of both SDA and SCL signals
pulse width of spikes that must be
suppressed by the input filter
data output valid time
data input setup time
data input hold time
valid time on pin INT
reset time on pin INT
SS
= 0 V; T
amb
…continued
= 40 C to +85 C; unless otherwise specified.
Conditions
Rev. 07 — 13 November 2006
Conditions
8-bit I
[1]
[2]
Standard-mode
2
PCA9554/PCA9554A
Min
300
250
100
C-bus and SMBus I/O port with interrupt
4.7
4.0
4.7
4.0
0.3
4.7
4.0
0
0
1
-
-
-
-
-
-
I
2
C-bus
Min
2.0
1000
Max
3.45
100
300
200
0.5
1
50
4
4
-
-
-
-
-
-
-
-
-
-
-
20 + 0.1C
20 + 0.1C
Fast-mode I
Typ
-
-
-
Min
100
100
1.3
0.6
0.6
0.6
0.1
1.3
0.6
50
0
0
1
-
-
-
-
b
b
© NXP B.V. 2006. All rights reserved.
[3]
[3]
Max
0.8
5.5
1
2
C-bus
Max
400
300
300
200
0.9
50
4
4
-
-
-
-
-
-
-
-
-
-
-
14 of 30
Unit
V
V
Unit
kHz
ns
ns
ns
ns
ns
ns
A
s
s
s
s
s
s
s
s
s
s
s
s