FIN12ACGFX Fairchild Semiconductor, FIN12ACGFX Datasheet - Page 17
![IC SERIALIZER/DESERIALIZER 42BGA](/photos/6/92/69251/fin12acgfx_sml.jpg)
FIN12ACGFX
Manufacturer Part Number
FIN12ACGFX
Description
IC SERIALIZER/DESERIALIZER 42BGA
Manufacturer
Fairchild Semiconductor
Series
SerDes™r
Datasheet
1.FIN12ACGFX.pdf
(21 pages)
Specifications of FIN12ACGFX
Function
Serializer/Deserializer
Data Rate
560Mbps
Input Type
LVCMOS
Output Type
LVCMOS
Number Of Inputs
12
Number Of Outputs
12
Voltage - Supply
1.65 V ~ 3.6 V
Operating Temperature
-30°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
42-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
FIN12ACGFXTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
FIN12ACGFX
Manufacturer:
VISHAY
Quantity:
3 791
Company:
Part Number:
FIN12ACGFX
Manufacturer:
Fairchild Semiconductor
Quantity:
10 000
FIN12AC Rev. 1.1.2
© 2006 Fairchild Semiconductor Corporation
DS+,CKS0+
AC Loading and Waveforms
Note: CKREF Signal can be stopped either High or LOW.
CKREF
DS–,CKS0-
CKSI+
S1 or S2
CKSI-
Note: CKREF must be active and PLL must be stable.
CKS0
DSI+
DSI-
Figure 20. Serializer Enable and Disable Time
Figure 18. PLL Loss of Clock Disable Time
t
PLZ(HZ)
Figure 16. Differential Input
V
Setup and Hold Times
DIFF=0
t
V
S_DS
DIFF=0
t
TPPLD0
V
ID
HIGHZ
/2
(Continued)
t
H_DS
t
PZL(ZH)
17
CKSO+
S1 or S2
Note: If S1(2) transitioning, then S2(1) must = 0 for test to be valid.
CKSO-
DSO+
DSO-
CKS0
S1 or S2
Figure 17. Differential Output Signal Skew
DP
Figure 19. PLL Power-Down Time
t
PLZ(HZ)
Figure 21. Deserializer Enable
V
DIFF
and Disable Times
V
DIFF
= 0
t
= 0
TPPLD1
t
SPOS
V
ID
/ 2
www.fairchildsemi.com
t
PZL(ZH)