FIN324CMLX Fairchild Semiconductor, FIN324CMLX Datasheet - Page 4

• Manufacturer Part Number: FIN324CMLX
• Description: IC SER DES 24BIT ULP 40-MLP
• Manufacturer: Fairchild Semiconductor
• Series: SerDes™r

Specifications of FIN324CMLX

• Function: Serializer/Deserializer
• Input Type: LVCMOS
• Output Type: LVCMOS
• Number Of Inputs: 24
• Number Of Outputs: 24
• Voltage - Supply: 1.6 V ~ 3 V
• Operating Temperature: -30°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 40-MLP
• Operating Supply Voltage: 3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Maximum Output Current: 10 mA
• Minimum Operating Temperature: - 30 C
• Resolution: 320 x 240
• Supply Current: 5 uA
• No. Of Inputs: 24
• No. Of Outputs: 24
• Supply Voltage Range: 2.5V To 3V, 1.6V To 3V
• Driver Case Style: MLP
• No. Of Pins: 40
• Termination Type: SMD
• Operating Temperature Range: -30°C To +85°C
• Rohs Compliant: Yes
• Filter Terminals: SMD
• Digital Ic Case Style: MLP
• Frequency: 15MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Rate: -
• Lead Free Status / Rohs Status: Details

© 2006 Fairchild Semiconductor Corporation
FIN324C Rev. 1.1.4
Pin Assignments
A
B
C
D
E
G
F
CKSEL
CKS+
CKS-
GND
R/W
DS+
PAR/SPI
DS-
CKSEL
1
VDDS
VDDA
CKS+
CKS-
/RES
DS+
M/S
DS-
or SDAT
CNTL[4]
CNTL[5]
or SCLK
VDDP
VDDS
VDDA
1
2
3
4
5
6
7
8
9
10
GND
/RES
2
Master (M/S=1)
Figure 2.
PAR/SPI
CNTL[1]
CNTL[2]
CNTL[3]
/STBY
GND
M/S
Ground Pad
3
Master
M/S=1
STROB1
STROB0
CNTL[0]
DP[11]
MLP Pin Assignments (40 Pins, 6x6mm, .5mm Pitch, Top View)
DP[2]
DP[0]
DP[1]
4
Figure 3.
DP[17]
DP[15]
DP[13]
DP[9]
DP[7]
DP[4]
DP[3]
5
30
29
28
27
26
25
24
23
22
21
G
A
B
C
D
E
F
DP[16]
DP[15]
DP[14]
DP[13]
DP[12]
VDDP
DP[11]
DP[10]
DP[9]
DP[8]
DP[16]
DP[14]
DP[12]
DP[10]
1
DP[8]
DP[6]
DP[5]
42 FBGA Package
3.5mm x 4.5mm
6
(.5mm Pitch)
2
(Top View)
BGA Pin Assignments
3
4
4
C
D
G
A
B
E
F
PAR/SPI
5
VDDP
VDDS
VDDA
CKS+
CKS-
/RES
DS+
M/S
DS-
VDDP
CKS+
6
CKS-
GND
R/W
DS+
DS-
1
1
2
3
4
5
6
7
8
9
10
or SDAT
CNTL[4]
CNTL[5]
or SCLK
VDDP
VDDS
VDDA
GND
/RES
2
Slave (M/S=0)
Ground Pad
Slave
PAR/SPI
CNTL[2]
CNTL[3]
CNTL[1]
M/S=0
SLEW
GND
M/S
3
CNTL[0]
WCLK0
WCLK1
DP[11]
DP[2]
DP[0]
DP[1]
4
30
29
28
27
26
25
24
23
22
21
DP[7] or
DP[17]
DP[15]
DP[13]
SDAT
DP[9]
DP[4]
DP[3]
DP[16]
DP[15]
DP[14]
DP[13]
DP[12]
VDDP
DP[11]
DP[10]
DP[9]
DP[8]
5
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DP[6] or
DP[16]
DP[14]
DP[12]
DP[10]
DP[8]
SCLK
DP[5]
6