QLX4600LIQT7 Intersil, QLX4600LIQT7 Datasheet - Page 14

• Manufacturer Part Number: QLX4600LIQT7
• Description: IC EQUALIZER REC 6.25GBPS 46QFN
• Manufacturer: Intersil
• Series: QLx™r

Specifications of QLX4600LIQT7

• Applications: Data Transport
• Voltage - Supply: 1.1 V ~ 1.3 V
• Package / Case: 46-WQFN
• Mounting Type: Surface Mount
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Interface: -
• Other names: QLX4600LIQT7-TR

QLx4600-SL30 v3.0
The boost setting for equalizer channel k can be read as a three digit ternary number across CP[k][A,B,C]. The ternary value is established by
the value of the resistor between VDD and the CP[k][A,B,C] pin.
As a second option, the equalizer boost setting can be taken from a set of registers programmed through a serial bus interface (pins 16, 17,
45, and 46). Using this interface, a set of registers is programmed to store the boost level. A total of 21 registers are used. Registers 2
through 21 are parsed into four 5-bit words. Each 5-bit word determines which of 32 boost levels to use for the corresponding equalizer.
Register 1 instructs the QLx4600-SL30 to use registers 2 through 21 to set the boost level rather than the control pins CP[k][A,B,C].
Both options have their relative advantages. The control pin option minimizes the need for external controllers as the boost level can be set in
the board design resulting in a compact layout. The register option is more flexible for cases in which the optimum boost level will not be
known and can be changed by a host bus adapter with a small number of pins. It is noted that the serial bus interface can also be daisy-
chained among multiple QLx4600-SL30 devices to afford a compact programmable solution even when a large number of data lines need to
be equalized.
Upon power-up, the default value of all the registers (and register 1 in particular) is zero, and thus, the CP pins are used to set the boost level.
This permits an alternate interpretation on setting the boost level. Specifically, the CP pins define the default boost level until the registers are
(if ever) programmed via the serial bus.
CONTROL PIN BOOST SETTING
When register 1 of the QLx4600-SL30 is zero (the default
state on power-up), the voltages at the CP pins are used to
determine the boost level of each channel. For each of the
four channels, k, the [A], [B], and [C] control pins (CP[k]) are
associated with a 3-bit non binary word. While [A] can take
one of two values, ‘LOW’ or ‘HIGH’, [B] and [C] can take one
of three different values: ‘LOW’, ‘MIDDLE’, or ‘HIGH’. This is
achieved by changing the value of a resistor connected
between VDD and the CP pin, which is internally pulled low
with a 25kΩ resistor. Thus, a ‘HIGH’ state is achieved by
using a 0Ω resistor, ‘MIDDLE’ is achieved with a 25kΩ
resistor, and ‘LOW’ is achieved with an open resistance.
Table 8 defines the mapping from the 3-bit CP word to the 18
out of 32 possible levels available via the serial interface.
If all four channels are to use the same boost level, then a
minimum number of board resistors can be realized by tying
together like CP[k][A,B,C] pins across all channels k. For
instance, all four CP[k][A] pins can be tied to the same
resistor running to VDD. Consequently, only three resistors
are needed to control the boost of all four channels. If the CP
Pins are tied together and the 25kΩ is used, the value
changes to a 6.25kΩ resistor because the 25kΩ is divided by
4.
TABLE 8: MAPPING BETWEEN CP-SETTING RESISTOR AND
PROGAMMED BOOST LEVELS
14
CP[A]
Open
Open
Open
Open
Open
Open
Open
Open
Open
0Ω
0Ω
0Ω
0Ω
0Ω
0Ω
0Ω
0Ω
0Ω
Resistance Between CP Pin and V
Open-0
CP[B]
Open
Open
25kΩ
25kΩ
25kΩ
Open
Open
Open
25kΩ
25kΩ
25kΩ
0Ω
0Ω
0Ω
0Ω
0Ω
0Ω
CP[C]
Open
25kΩ
Open
25kΩ
Open
25kΩ
Open
25kΩ
Open
25kΩ
Open
25kΩ
DD
0Ω
0Ω
0Ω
0Ω
0Ω
0Ω
QLx4600-SL30
Serial Boost Level
10
12
14
15
16
17
19
21
23
24
26
28
31
0
2
4
6
8
©2009 Quellan, Inc