PI7C7300DNAE Pericom Semiconductor, PI7C7300DNAE Datasheet - Page 18

IC PCI-PCI BRIDGE 3PORT 272-BGA

PI7C7300DNAE

Manufacturer Part Number
PI7C7300DNAE
Description
IC PCI-PCI BRIDGE 3PORT 272-BGA
Manufacturer
Pericom Semiconductor
Datasheet

Specifications of PI7C7300DNAE

Applications
*
Interface
*
Voltage - Supply
*
Package / Case
272-PBGA
Mounting Type
Surface Mount
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3 V to 3.6 V
Supply Current (max)
660 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PI7C7300DNAE
Manufacturer:
Pericom
Quantity:
135
Part Number:
PI7C7300DNAE
Manufacturer:
MAX
Quantity:
5 510
Part Number:
PI7C7300DNAE
Manufacturer:
Pericom
Quantity:
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3.7
3.8
3.9
Pericom Semiconductor
JTAG BOUNDARY SCAN SIGNALS
POWER AND GROUND
PI7C7300D PBGA PIN LIST
Name
HS_EN
ENUM#
Name
TCK
TMS
TDO
TDI
TRST#
Name
VDD
VSS
AVCC
AGND
Pin #
A1
A3
A5
Name
S2_CBE[2]
VSS
VSS
Pin #
U6
R4
Pin #
V2
W1
V3
W2
U3
Pin #
B8, C14, D5, D11,
D15, E2, F18, J3,
L17, N2, P19,
U10, V1, V7, V15,
W20
A3, A5, A8, A10,
A15, A17, A20,
C2, D12, D18, E3,
G2, G17, H17, J2,
J9, J10, J11, J12,
K4, K9, K10, K11,
K12, K19, L9,
L10, L11, L12,
M9, M10, M11,
M12, M18, N1,
P18, R2, T18, U2,
U9, U14, U17,
V17, W11, Y6,
Y13
Y1
U4
Page 18 of 107
Type
PB
-
-
Type
PI
POD
Type
PIU
PIU
PTS
PIU
PIU
Type
Description
Hot Swap Enable. To enable Hot Swap Friendly
support, this signal should be pulled HIGH.
Hot Swap Status Indicator. The output of ENUM#
indicates to the system that an insertion has occurred of
that an extraction is about to occur.
Description
Test Clock. Used to clock state information and data
into and out of the PI7C7300D during boundary scan.
Test Mode Select. Used to control the state of the Test
Access Port controller.
Test Data Output. When SCAN_EN is HIGH, it is
used (in conjunction with TCK) to shift data out of the
Test Access Port (TAP) in a serial bit stream.
Test Data Input. When SCAN_EN is HIGH, it is used
(in conjunction with TCK) to shift data and instructions
into the Test Access Port (TAP) in a serial bit stream.
Test Reset. Active LOW signal to reset the Test
Access Port (TAP) controller into an initialized state.
Description
3.3V Digital Power
Digital Ground
Analog 3.3V for PLL
Analog Ground for PLL
Pin #
A2
A4
A6
3-PORT PCI-TO-PCI BRIDGE
November 2005 - Revision 1.01
S2_TRDY#
Name
S2_CBE[1]
S2_AD[10]
PI7C7300D
PSTS
PB
PB
Type

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