NS7520B-1-C36 Digi International, NS7520B-1-C36 Datasheet - Page 13

• Manufacturer Part Number: NS7520B-1-C36
• Description: IC ARM MICROPROCESSOR 177BGA
• Manufacturer: Digi International
• Series: NET+ARM®r

Specifications of NS7520B-1-C36

• Applications: Network Processor
• Core Processor: ARM7
• Program Memory Type: External Program Memory
• Controller Series: -
• Ram Size: External
• Interface: EBI/EMI, Ethernet, DMA, SPI, UART
• Number Of I /o: 16
• Voltage - Supply: 1.4 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 177-LFBGA
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

System bus interface signal descriptions
RW_
BR_
BG_
BUSY_
BCLK
ADDR[27:0]
DATA[31:0]
TS_
BE_
TA_
TEA_
RW_
BR_
BG_
BUSY_
Symbol
Mnemonic
Bus clock
Address bus
Data bus
Transfer start
Byte enable
Transfer acknowledge
Transfer error
acknowledge
Read/write indicator
Bus request
Bus grant
Bus busy
Signal
D6
D7
C7
B7
Pin
I/O
NO CONNECT
NO CONNECT
NO CONNECT
I/O
Provides the bus clock. All system bus interface signals are
referenced to the BCLK signal.
Identifies the address of the peripheral being addressed by the
current bus master. The address bus is bi-directional.
Provides the data transfer path between the NS7520 and external
peripheral devices. The data bus is bi-directional.
Recommendation: Less than x32 (S)DRAM/SRAM memory
configurations. Unconnected data bus pins will float during memory
read cycles. Floating inputs can be a source of wasted power.
For other than x32 DRAM/SRAM configurations, the unused data
bus signals should be pulled up.
NO CONNECT
Identifies which 8-bit bytes of the 32-bit data bus are active during
any given system bus memory cycle. The BE_ signals are active low
and bi-directional.
Indicates the end of the current system bus memory cycle. This
signal is driven to 1 prior to
tri-stating its driver.
TA_ is bi-directional.
Indicates an error termination or burst cycle termination:
This signal is driven to 1 prior to tri-stating its driver.
TEA_ is bi-directional. The NS7520 or the external peripheral can
drive this signal.
Indicates the direction of the system bus memory cycle. RW_ high
indicates a read operation; RW_ low indicates a write operation. The
RW_ signal is bi-directional.
NO CONNECT
NO CONNECT
NO CONNECT
Description
Independently of TA_ to signal that an error occurred during the
current bus cycle. TEA_ terminates the current burst cycle.
In conjunction with TA_ to signal the end of a burst cycle.
2
OD
Transfer direction
Description
w w w . d i g i . c o m
S y s t e m B u s i n t e r f a c e
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