NS7520B-1-C36 Digi International, NS7520B-1-C36 Datasheet - Page 33

• Manufacturer Part Number: NS7520B-1-C36
• Description: IC ARM MICROPROCESSOR 177BGA
• Manufacturer: Digi International
• Series: NET+ARM®r

Specifications of NS7520B-1-C36

• Applications: Network Processor
• Core Processor: ARM7
• Program Memory Type: External Program Memory
• Controller Series: -
• Ram Size: External
• Interface: EBI/EMI, Ethernet, DMA, SPI, UART
• Number Of I /o: 16
• Voltage - Supply: 1.4 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 177-LFBGA
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Reset_timing
From a cold start, RESET_ must be asserted until all power supplies are above their specified
thresholds. An additional 8 microseconds is required for oscillator settling time (allow 40ms for
crystal startup).
Due to an internal three flip-flop delay on the external RESET_ signal, after the oscillator is
settled, RESET_ must be asserted for three periods of the XTALA1 clock in these situations:
The PORTC4 output indicates the reset state of the chip. PORTC4 persists beyond the negation of
RESET_ for approximately 512 system clock cycles if the PLL is disabled. When the PLL is enabled,
PORTC4 persists beyond the negation of RESET_ to allow for PLL lock for 100 microseconds times
the ratio of the VCO to XTALA.
Reset timing parameters
1
2
3
4
VDD, VCC
Num
RESET_
XTALA1
Before release of reset after application of power
While valid power is maintained to initiate hot reset (reset while power is at or above
specified thresholds)
Before loss of valid power during power outage/power down
Power valid before reset negated
Reset asserted after power valid
Reset asserted while power valid
Reset asserted before power invalid
Description
1
2
40
3
3
3
Min
3 3
Typ
w w w . d i g i . c o m
Max
ms
Note: RESET_ should remain low
for at least 40ms after power
reaches 3.0V.
T
T
T
Units
XTALA1
XTALA1
XTALA1
4
R e s e t _ t i m i n g
2 9