AD8112-EVALZ Analog Devices Inc, AD8112-EVALZ Datasheet - Page 26

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AD8112-EVALZ

Manufacturer Part Number
AD8112-EVALZ
Description
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD8112-EVALZ

Lead Free Status / Rohs Status
Compliant
AD8112
PCB LAYOUT
Extreme care must be exercised to minimize additional cross-
talk generated by the system circuit board(s). The areas that
must be carefully designed are grounding, shielding, signal
routing, and supply bypassing.
The packaging of the AD8112 is designed to help minimize
crosstalk. Each input is separated from each other input by
an analog ground pin. All of these AGNDs should be directly
connected to the ground plane of the circuit board. These
ground pins provide shielding, low impedance return paths,
and physical separation for the inputs. All of these help to
reduce crosstalk.
Each output is separated from its two neighboring outputs by
an analog supply pin of one polarity or the other. Each of these
analog supply pins provides power to the output stages of only
the two nearest outputs. These supply pins provide shielding,
physical separation, and a low impedance supply for the outputs.
Individual bypassing of each of these supply pins with a 0.01 μF
chip capacitor connected directly to the ground plane minimizes
high frequency output crosstalk via the mechanism of sharing
common impedances.
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In addition, each output has an on-chip compensation capaci-
tor that is individually tied to the nearby analog ground pins
(AGND00 through AGND07). This technique reduces crosstalk
by preventing the currents that flow in these paths from sharing
a common impedance on the IC and in the package pins. These
AGNDxx signals should all be connected directly to the
ground plane.
The input and output signals have minimum crosstalk if they
are located between ground planes on layers above and below,
and separated by ground in between. Vias should be located as
close to the IC as possible to carry the inputs and outputs to the
inner layer. The input and output signals surface at the input
termination resistors and at the output series back-termination
resistors. To the extent possible, these signals should also be
separated as soon as they emerge from the IC package.