AM29LV800DT-70EC AMD (ADVANCED MICRO DEVICES), AM29LV800DT-70EC Datasheet - Page 28

• Manufacturer Part Number: AM29LV800DT-70EC
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM29LV800DT-70EC

• Lead Free Status / Rohs Status: Not Compliant

9.2
9.3
28
RY/BY#: Ready/Busy#
DQ6: Toggle Bit I
Notes
1. VA = Valid address for programming. During a sector erase operation, a valid address is an address within any sector selected for
2. DQ7 should be rechecked even if DQ5 = 1 because DQ7 may change simultaneously with DQ5.
The RY/BY# is a dedicated, open-drain output pin that indicates whether an Embedded Algorithm is in
progress or complete. The RY/BY# status is valid after the rising edge of the final WE# pulse in the command
sequence. Since RY/BY# is an open-drain output, several RY/BY# pins can be tied together in parallel with a
pull-up resistor to V
If the output is low (Busy), the device is actively erasing or programming. (This includes programming in the
Erase Suspend mode.) If the output is high (Ready), the device is ready to read array data (including during
the Erase Suspend mode), or is in the standby mode.
Table 9.1 on page 31
Figure 15.5 on page 39
operations, respectively.
Toggle Bit I on DQ6 indicates whether an Embedded Program or Erase algorithm is in progress or complete,
or whether the device entered the Erase Suspend mode. Toggle Bit I may be read at any address, and is
valid after the rising edge of the final WE# pulse in the command sequence (prior to the program or erase
operation), and during the sector erase time-out.
erasure. During chip erase, a valid address is any non-protected sector address.
CC
shows the outputs for RY/BY#.
.
and
Figure 15.6 on page 40
No
Figure 9.1 Data# Polling Algorithm
S29AL008D
Read DQ7–DQ0
Read DQ7–DQ0
DQ7 = Data?
DQ7 = Data?
Addr = VA
Addr = VA
DQ5 = 1?
START
D a t a
FAIL
No
Yes
No
shows RY/BY# for read, reset, program, and erase
Figure 15.1 on page
S h e e t
Yes
Yes
PASS
S29AL008D_00_A11 February 27, 2009
36,
Figure 15.2 on page
37,