P89C51RB2HBA NXP Semiconductors, P89C51RB2HBA Datasheet - Page 49

• Manufacturer Part Number: P89C51RB2HBA
• Manufacturer: NXP Semiconductors

Specifications of P89C51RB2HBA

• Cpu Family: 89C
• Device Core: 80C51
• Device Core Size: 8b
• Frequency (max): 33MHz
• Interface Type: UART
• Program Memory Type: Flash
• Program Memory Size: 16KB
• Total Internal Ram Size: 512Byte
• # I/os (max): 32
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Instruction Set Architecture: CISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: PLCC
• Lead Free Status / Rohs Status: Not Compliant

to the nearest megahertz. For example, set R0 to 11 for 11.0592 MHz.
Philips Semiconductors
In Application Programming Method
Several In Application Programming (IAP) calls are available for use by
an application program to permit selective erasing and programming of
Flash sectors. All calls are made through a common interface,
PGM_MTP. The programming functions are selected by setting up
the microcontroller’s registers before making a call to PGM_MTP at
FFF0H. The oscillator frequency is an integer number rounded down
Results are returned in the registers. The IAP calls are shown in
Table 8.
Table 8. IAP calls
2002 May 24
80C51 8-bit Flash microcontroller family
16KB/32KB/64KB ISP/IAP Flash with 512B/512B/1KB RAM
PROGRAM DATA BYTE
ERASE BLOCK
ERASE BOOT VECTOR
PROGRAM SECURITY BIT
PROGRAM STATUS BYTE
IAP CALL
Input Parameters:
Return Parameter
Input Parameters:
Return Parameter
Input Parameters:
Return Parameter
Input Parameters:
Return Parameter
Input Parameters:
Return Parameter
R0 = osc freq (integer)
R1 = 02h
R1 = 82h (WDT feed)
DPTR = address of byte to program
ACC = byte to program
ACC = 00 if pass, !00 if fail
R0 = osc freq (integer)
R0 = 0 (Quick Erase)
R1 = 01h
R1 = 81h (WDT feed)
DPH = block code as shown below:
DPL = 00h
none
R0 = osc freq (integer)
R1 = 04h
R1 = 84h (WDT feed)
DPH = 00h
DPL = don’t care
none
R0 = osc freq (integer)
R1 = 05h
R1 = 85h (WDT feed)
DPH = 00h
DPL = 00h – security bit # 1 (inhibit writing to Flash)
none
R0 = osc freq (integer)
R1 = 06h
R1 = 86h (WDT feed)
DPH = 00h
DPL = 00h – program status byte
ACC = status byte
ACC = status byte
01h – security bit # 2 (inhibit Flash verify)
02h – security bit # 3 (disable external memory)
block 0,
block 1,
block 2, 16k to 32k, 40H
block 3, 32k to 48k, 80H
block 4, 48k to 64k, C0H
0k to
8k to 16k, 20H
46
8k, 00H
Using the Watchdog Timer (WDT)
The 89C51Rx2 devices support the use of the WDT in IAP. The user
specifies that the WDT is to be fed by setting the most significant bit
of the function parameter passed in R1 prior to calling PGM_MTP.
The WDT function is only supported for Block Erase when using
Quick Block Erase. The Quick Block Erase is specified by
performing a Block Erase with register R0 = 0. Requesting a WDT
feed during IAP should only be performed in applications that use
the WDT since the process of feeding the WDT will start the WDT if
the WDT was not running.
PARAMETER
P89C51RB2/P89C51RC2/
P89C51RD2Hxx
Product data