LH28F008SAT-12 Sharp Electronics, LH28F008SAT-12 Datasheet - Page 2

• Manufacturer Part Number: LH28F008SAT-12
• Manufacturer: Sharp Electronics

Specifications of LH28F008SAT-12

• Cell Type: NOR
• Density: 8Mb
• Access Time (max): 120ns
• Interface Type: Parallel
• Boot Type: Not Required
• Address Bus: 20b
• Operating Supply Voltage (typ): 5V
• Operating Temp Range: 0C to 70C
• Package Type: TSOP
• Program/erase Volt (typ): 11.4 to 12.6V
• Sync/async: Asynchronous
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Word Size: 8b
• Number Of Words: 1M
• Supply Current: 50mA
• Mounting: Surface Mount
• Pin Count: 40
• Lead Free Status / Rohs Status: Not Compliant

LH28F008SA
INTRODUCTION
the highest density nonvolatile read/write solution for
solid state storage. The LH28F008SA’s extended
cycling, symmetrically blocked architecture, fast access
time, write automation and low power consumption pro-
vide a more reliable, lower power, lighter weight and
higher performance alternative to traditional rotating disk
technology. The LH28F008SA brings new capabilities
to portable computing. Application and operating sys-
tem software stored in resident flash memory arrays
provide instant-on rapid execute-in-place and protec-
tion from obsolescence through in-system software
updates. Resident software also extends system bat-
tery life and increases relaibility by reducing disk drive
accesses.
LH28F008SA offers a more cost-effective and reliable
alternative to SRAM and battery. Traditional high
density embedded applications, such as telecommuni-
cations, can take advantage of the LH28F008SA’s
nonvolatility, blocking and minimal system code require-
ments for flexible firmware and modular software
designs.
2
44-PIN SOP
SHARP’S LH28F008SA 8M Flash File™ Memory is
For high density data acquisition applications, the
Figure 2. 44-Pin SOP Configuration
GND
GND
DQ
DQ
DQ
DQ
V
A
NC
NC
RP
A
A
A
A
A
A
A
A
A
A
PP
A
10
11
6
4
3
9
8
7
5
3
2
0
0
2
1
1
10
17
1
2
3
8
12
13
14
15
16
18
19
20
4
5
6
7
9
11
21
22
44
38
37
36
34
30
28
27
25
24
23
43
42
40
39
35
33
32
29
26
31
41
RY/BY
A
A
A
A
NC
NC
OE
DQ
DQ
DQ
DQ
V
CE
A
A
A
A
NC
NC
WE
V
CC
13
14
15
16
17
18
19
CC
12
7
6
5
4
TOP VIEW
28F008SA-16
dard) package. Pin assignments simplify board layout
when integrating multiple devices in a flash memory
array or subsystem. This device uses an integrated
Command User Interface and state machine for simpli-
fied block erasure and byte write. The LH28F008SA
memory map consists of 16 separately erasable
64K blocks.
circuitry for systems requiring low power consumption
and noise immunity. Its 85 ns access time provides
superior performance when compared with magnetic
storage media. A deep powerdown mode lowers power
consumption to 1 µW typical through V
table computing, handheld instrumentation and other
low-power applications. The PWD power control input
also provides absolute data protection during system
power up/down.
DESCRIPTION
(8,388,608 bit) memory organized at 1M (1,048,576
bytes) of 8 bits each. Sixteen 64K (65,536 Byte) blocks
are included on the LH28F008SA. A memory map is
shown in Figure 4 of this specification. A block erase
operation erases one of the sixteen blocks of memory
in typically 1.6 seconds, independent of the remaining
blocks. Each block can be independently erased and
written 100,000 cyles. Erase Suspend mode allows sys-
tem software to suspend block erase to read data or
execute code from any other block of the LH28F008SA.
(Thin Small Outline Package, 1.2 mm thick) package.
Pinouts are shown in Figure 1 of this specification.
face between the microprocessor or microcontroller and
the internal operation of the LH28F008SA.
write and block erase operations to be executed using
a two-write command sequence to the Command User
Interface. The internal Write State Machine (WSM)
automatically executes the algorithms and timings nec-
essary for byte write and block erase operations,
including verifications, thereby unburdening the micro-
processor or microcontroller. Writing of memory data is
performed in byte increments typically within 9 µs, an
80% improvement over current flash memory products.
I
cal, 30 mA maximum. V
voltage is 11.4 V to 12.5 V.
and when the WSM successfully completes the desired
byte write or block erase operation.
PP
The LH28F008SA is offered in 40-pin TSOP (stan-
SHARP’s LH28F008SA employs advanced CMOS
The LH28F008SA is a high-performance 8M
The LH28F008SA is available in the 40-pin TSOP
The Command User Interface serves as the inter-
Byte Write and Block Erase Automation allow byte
The Status Register indicates the status of the WSM
byte write and block erase currents are 10 mA typi-
PP
8M (1M × 8) Flash Memory
byte write and block erase
CC
, crucial in por-