LH28F008SAT-12 Sharp Electronics, LH28F008SAT-12 Datasheet - Page 7

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LH28F008SAT-12

Manufacturer Part Number
LH28F008SAT-12
Description
Manufacturer
Sharp Electronics
Datasheet

Specifications of LH28F008SAT-12

Cell Type
NOR
Density
8Mb
Access Time (max)
120ns
Interface Type
Parallel
Boot Type
Not Required
Address Bus
20b
Operating Supply Voltage (typ)
5V
Operating Temp Range
0C to 70C
Package Type
TSOP
Program/erase Volt (typ)
11.4 to 12.6V
Sync/async
Asynchronous
Operating Temperature Classification
Commercial
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Word Size
8b
Number Of Words
1M
Supply Current
50mA
Mounting
Surface Mount
Pin Count
40
Lead Free Status / Rohs Status
Not Compliant
8M (1M × 8) Flash Memory
internal byte write and block erase can be stored in any
of the LH28F008SA blocks. This code is copied to, and
executed from, system RAM during actual flash memory
update. After successful completion of byte write
and/or block erase, code/data reads from the
LH28F008SA are again possible via the Read Array
command. Erase suspend/resume capability allows
system software to suspend block erase to read data
and execute code from any other block.
Command User Interface and
Write Automation
byte write, freeing the system processor for other tasks.
After receiving the Erase Setup and Erase Confirm com-
mands, the state machine controls block pre-condition-
ing and erase, returning progress via the Status Register
and RY
ter destination address and expected data are supplied.
The program and erase algorithms of past standard
Flash memories are now regulated by the state ma-
chine, including pulse repetition where required and in-
ternal verification and margining of data.
Bus Operations
1. Refer to DC Characteristics. When V
2. X can be V
3. RY
4. Command writes involving block erase or byte write are only successfully executed when V
5. Refer to the Command Definitions Table for valid D
NOTES:
Read
Output Disable
Standby
Deep Power Down
Intelligent Identifier (Mfr)
Intelligent Identifier (Device)
Write
Interface software to initiate and poll progress of
An on-chip state machine controls block erase and
not busy, in Erase Suspend mode or deep powerdown mode.
    »
/ BY
    »
/ BY
    »
is V
    »
MODE
IL
output. Byte write is similarly controlled, af-
OL
or V
when the Write State Machine is executing internal block erase or byte write algorithms. It is V
IH
for control pins and addresses, and V
PWD
V
V
V
V
V
V
V
IH
IH
IH
IH
IH
IH
PP
IL
= V
PPL
CE
V
V
V
V
V
V
X
IH
, memory contents can be read but not written or erased.
IL
IL
IL
IL
IL
»
IN
during a write operation.
OE
V
V
V
V
V
X
X
IH
IH
IL
IL
IL
PPL
»
or V
WE
V
V
V
V
V
PPH
X
X
IH
IH
IH
IH
IL
for V
Data Protection
may choose to make the V
able only when memory byte writes/block erases are
required) or hardwired to V
LH28F008SA Command User interface architecture pro-
vides protection from unwanted byte write or block erase
operations even when high voltage is applied to V
Additionally, all functions are disabled whenever V
below the write lockout voltage V
at V
practice and encourages optimization of the processor-
memory interface.
Interface write sequence provides additional software
write protection.
BUS OPERATION
via the local CPU. All bus cycles to or from the flash
memory conform to standard microprocessor bus
cycles.
Read
memory can be read from any of its blocks, and infor-
mation can be read from the intelligent identifier or Sta-
tus Register. V
Depending on the application, the system designer
V
The two-step byte write/block erase Command User
Flash memory reads, erases and writes in-system
The LH28F008SA has three read modes. The
PP
V
V
PPL
IL
A
X
X
X
X
X
IH
IL
. See DC Characteristics for V
. The LH28F008SA accomodates either design
0
, memory contents cannot be altered. The
V
X
X
X
X
X
X
X
PP
PP
can be at either V
PP
DQ
= V
High-Z
High-Z
High-Z
D
A2H
0
89H
D
OUT
PPH
- DQ
IN
.
PPH
PP
7
PPL
power switchable (avail-
. When V
RY
OH
LKO
V
V
V
and V
X
X
X
OH
OH
OH
X
»
when the WSM is
/ BY
PPL
, or when PWD is
PPH
»
or V
PP
LH28F008SA
voltages.
=
1, 2, 3
3, 4, 5
NOTE
PPH
3
3
.
CC
PP
is
7
.

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