JS28F128P30T85 Micron Technology Inc, JS28F128P30T85 Datasheet - Page 62

• Manufacturer Part Number: JS28F128P30T85
• Manufacturer: Micron Technology Inc

Specifications of JS28F128P30T85

• Cell Type: NOR
• Density: 128Mb
• Access Time (max): 85/17ns
• Interface Type: Parallel/Serial
• Boot Type: Top
• Address Bus: 23b
• Operating Supply Voltage (typ): 1.8V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Program/erase Volt (typ): 1.7 to 2/8.5 to 9.5V
• Sync/async: Async/Sync
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 1.7V
• Operating Supply Voltage (max): 2V
• Word Size: 16b
• Number Of Words: 8M
• Supply Current: 28mA
• Mounting: Surface Mount
• Pin Count: 56
• Lead Free Status / Rohs Status: Compliant

Figure 25: Continuous Burst Read, Showing An Output Delay Timing
Notes:
1.
2.
Figure 26: Synchronous Burst-Mode Four-Word Read Timing
Note:
Datasheet
62
Address [A]
Data [D/Q]
Address [A]
Data [D/Q]
ADV# [V]
WAIT [T]
ADV# [V]
OE# [G]
WAIT [T]
CLK [C]
CE# [E]
OE# [G]
CLK [C]
CE# [E]
WAIT is driven per OE# assertion during synchronous array or non-array read, and can be configured to assert either
during or one data cycle before valid data.
At the end of Word Line; the delay incurred when a burst access crosses a 16-word boundary and the starting address is
not 4-word boundary aligned.
WAIT is driven per OE# assertion during synchronous array or non-array read. WAIT asserted during initial latency and
deasserted during valid data (RCR[10] = 0, Wait asserted low).
R105
R105
R105
R105
R301
R301
R302
R303
R302
R303
R101
R101
R102
R102
A
R306
R306
R15
R106
R106
R15
R2
R3
R7
R2
R7
R3
R4
R4
y
R307
R304
R307
R304
Q0
R312
R305
R305
R304
Q1
R305
R304
Q2
R305
R304
Q3
R17
R9
R10
R8
R304
R305
August 2008
306666-12
P30