EPM9560RC208-20 Altera, EPM9560RC208-20 Datasheet - Page 16

• Manufacturer Part Number: EPM9560RC208-20
• Manufacturer: Altera

Specifications of EPM9560RC208-20

• Family Name: MAX 9000
• Memory Type: EEPROM
• # Macrocells: 560
• Number Of Usable Gates: 12000
• Frequency (max): 100MHz
• Propagation Delay Time: 20ns
• Number Of Logic Blocks/elements: 35
• # I/os (max): 153
• Operating Supply Voltage (typ): 5V
• In System Programmable: Yes
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 208
• Package Type: RQFP
• Lead Free Status / Rohs Status: Not Compliant

MAX 9000 Programmable Logic Device Family Data Sheet
16
Figure 9. MAX 9000 Column-to-IOC Connections
Dedicated Inputs
In addition to the general-purpose I/O pins, MAX 9000 devices have four
dedicated input pins. These dedicated inputs provide low-skew, device-
wide signal distribution to the LABs and IOCs in the device, and are
typically used for global clock, clear, and output enable control signals.
The global control signals can feed the macrocell or IOC clock and clear
inputs, as well as the IOC output enable. The dedicated inputs can also be
used as general-purpose data inputs because they can feed the row
FastTrack Interconnect (see
I/O Cells
Figure 10
device from either the I/O pins that provide general-purpose input
capability or from the four dedicated inputs. The IOCs are located at the
ends of the row and column interconnect channels.
Each IOC is driven by
a 17-to-1 multiplexer.
shows the IOC block diagram. Signals enter the MAX 9000
IOC1
17
Figure 2 on page
Column FastTrack
Interconnect
48
48
48
IOC10
17
7).
Altera Corporation
Each IOC can drive up
to two column
channels.