EPM9560RC208-20 Altera, EPM9560RC208-20 Datasheet - Page 5

EPM9560RC208-20

Manufacturer Part Number
EPM9560RC208-20
Description
Manufacturer
Altera
Datasheet

Specifications of EPM9560RC208-20

Family Name
MAX 9000
Memory Type
EEPROM
# Macrocells
560
Number Of Usable Gates
12000
Frequency (max)
100MHz
Propagation Delay Time
20ns
Number Of Logic Blocks/elements
35
# I/os (max)
153
Operating Supply Voltage (typ)
5V
In System Programmable
Yes
Operating Supply Voltage (min)
4.75V
Operating Supply Voltage (max)
5.25V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
208
Package Type
RQFP
Lead Free Status / Rohs Status
Not Compliant

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Altera Corporation
Functional
Description
f
The MAX 9000 family is supported by Altera’s MAX+PLUS II
development system, a single, integrated software package that offers
schematic, text—including VHDL, Verilog HDL, and the Altera
Hardware Description Language (AHDL)—and waveform design entry,
compilation and logic synthesis, simulation and timing analysis, and
device programming. The MAX+PLUS II software provides EDIF 2 0 0
and 3 0 0, LPM, and other interfaces for additional design entry and
simulation support from other industry-standard PC- and UNIX-
workstation-based EDA tools. The MAX+PLUS II software runs on
Windows-based PCs as well as Sun SPARCstation, HP 9000 Series
700/800, and IBM RISC System/6000 workstations.
For more information on development tools, see the
Programmable Logic Development System & Software Data
MAX 9000 devices use a third-generation MAX architecture that yields
both high performance and a high degree of utilization for most
applications. The MAX 9000 architecture includes the following elements:
Figure 1
Logic array blocks
Macrocells
Expander product terms (shareable and parallel)
FastTrack Interconnect
Dedicated inputs
I/O cells
shows a block diagram of the MAX 9000 architecture.
MAX 9000 Programmable Logic Device Family Data Sheet
MAX+PLUS II
Sheet.
5

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