MC68HC912B32VFU8 Freescale Semiconductor, MC68HC912B32VFU8 Datasheet - Page 118

MC68HC912B32VFU8

Manufacturer Part Number
MC68HC912B32VFU8
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68HC912B32VFU8

Cpu Family
HC12
Device Core Size
16b
Frequency (max)
8MHz
Interface Type
SCI/SPI
Program Memory Type
EPROM
Program Memory Size
32KB
Total Internal Ram Size
1KB
# I/os (max)
63
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
PQFP
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC912B32VFU8
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
Clock Generation Module (CGM)
10.7.2 Real-Time Interrupt Control Register
Read: Anytime
Write: Varies on a bit-by-bit basis
RTIE — Real-Time Interrupt Enable Bit
RSWAI — RTI and COP Stop While in Wait Bit
RSBCK — RTI and COP Stop While in Background Debug Mode Bit
RTBYP — Real-Time Interrupt Divider Chain Bypass Bit
RTR2, RTR1, and RTR0 — Real-Time Interrupt Rate Select Bits
118
Write anytime.
Write once in normal modes, anytime in special modes.
Write once in normal modes, anytime in special modes.
Write is not allowed in normal modes, anytime in special modes.
Write anytime.
Rate select for real-time interrupt. The E clock is used for this module.
0 = Interrupt requests from RTI are disabled.
1 = Interrupt is requested when RTI is set.
0 = Allows the RTI and COP to continue running in wait
1 = Disables both the RTI and COP when the part goes into wait
0 = Allows the RTI and COP to continue running while in background mode
1 = Disables RTI and COP when the part is in background mode (useful for emulation)
0 = Divider chain functions normally.
1 = Divider chain is bypassed, allows faster testing. The divider chain is normally P divided by 2
when bypass becomes P divided by 4.
RTR2
Address: $0014
0
0
0
0
1
1
1
1
Reset:
Read:
Write:
Figure 10-6. Real-Time Interrupt Control Register (RTICTL)
RTR1
0
0
1
1
0
0
1
1
RTIE
Bit 7
0
RTR0
= Unimplemented
0
1
0
1
0
1
0
1
RSWAI
Table 10-3. Real-Time Interrupt Rates
6
0
M68HC12B Family Data Sheet, Rev. 9.1
Divide E By:
OFF
RSBCK
2
2
2
2
2
2
2
13
14
15
16
17
18
19
5
0
4
0
0
Timeout Period
E = 4.0 MHz
16.384 ms
32.768 ms
65.536 ms
131.72 ms
2.048 ms
4.096 ms
8.196 ms
OFF
RTBYP
3
0
RTR2
2
0
Timeout Period
E = 8.0 MHz
RTR1
16.384 ms
32.768 ms
65.536 ms
1.024 ms
2.048 ms
4.096 ms
8.196 ms
1
0
OFF
Freescale Semiconductor
RTR0
Bit 0
0
13
,

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