MACH210-15JC Lattice, MACH210-15JC Datasheet - Page 12

• Manufacturer Part Number: MACH210-15JC
• Description: CPLD MACH 2 Family 64 Macro Cells 66.6MHz EECMOS Technology 5V 44-Pin PLCC
• Manufacturer: Lattice

Specifications of MACH210-15JC

• Package: 44PLCC
• Family Name: MACH 2
• Number Of Macro Cells: 64
• Maximum Propagation Delay Time: 15 ns
• Number Of User I/os: 32
• Number Of Logic Blocks/elements: 4
• Typical Operating Supply Voltage: 5 V
• Maximum Operating Frequency: 66.6 MHz
• Number Of Product Terms Per Macro: 16
• Memory Type: EEPROM
• Re-programmability Support: Yes
• Operating Temperature: 0 to 70 °C

SWITCHING CHARACTERISTICS over COMMERCIAL operating ranges (continued)
12
Note:
1. These parameters are not 100% tested, but are evaluated at initial characterization and at any time the design is modified
Parameter
Symbol
t
t
where capacitance may be affected.
t
t
t
t
WIGL
PDLL
t
ARW
APW
t
ARR
t
APR
t
t
IGS
AR
AP
EA
ER
Parameter Description
Input Latch Gate to Output Latch Setup
Input Latch Gate Width LOW
Input, I/O, or Feedback to Output Through Transparent
Input and Output Latches
Asynchronous Reset to Registered or Latched Output
Asynchronous Reset Width
Asynchronous Reset Recovery Time
Asynchronous Preset to Registered or Latched Output
Asynchronous Preset Width
Asynchronous Preset Recovery Time
Input, I/O, or Feedback to Output Enable
Input, I/O, or Feedback to Output Disable
MACH210A-7 (Com’l)
Min
10
3
8
8
8
8
-7
Max
11.5
7.5
7.5
12
12
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns