MACH210-15JC Lattice, MACH210-15JC Datasheet - Page 30
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MACH210-15JC
Manufacturer Part Number
MACH210-15JC
Description
CPLD MACH 2 Family 64 Macro Cells 66.6MHz EECMOS Technology 5V 44-Pin PLCC
Manufacturer
Lattice
Datasheet
1.MACH210-15JC.pdf
(47 pages)
Specifications of MACH210-15JC
Package
44PLCC
Family Name
MACH 2
Number Of Macro Cells
64
Maximum Propagation Delay Time
15 ns
Number Of User I/os
32
Number Of Logic Blocks/elements
4
Typical Operating Supply Voltage
5 V
Maximum Operating Frequency
66.6 MHz
Number Of Product Terms Per Macro
16
Memory Type
EEPROM
Re-programmability Support
Yes
Operating Temperature
0 to 70 °C
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Company
Part Number
Manufacturer
Quantity
Price
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SWITCHING CHARACTERISTICS over COMMERCIAL operating ranges (Note 2)
(continued)
Notes:
1. These parameters are not 100% tested, but are evaluated at initial characterization and at any time the design is modified
2. See Switching Test Circuit, for test conditions.
3. Parameters measured with 16 outputs switching.
Parameter
30
Symbol
t
t
t
t
t
t
where capacitance may be affected.
WIGL
PDLL
t
ARW
APW
t
ARR
t
APR
t
AR
ER
AP
EA
Parameter Description
Input Latch Gate Width LOW
Input, I/O, or Feedback to Output Through Transparent
Input and Output Latches
Asynchronous Reset to Registered or Latched Output
Asynchronous Reset Width (Note 1)
Asynchronous Reset Recovery Time (Note 1)
Asynchronous Preset to Registered or Latched Output
Asynchronous Preset Width (Note 1)
Asynchronous Preset Recovery Time (Note 1)
Input, I/O, or Feedback to Output Enable (Note 3)
Input, I/O, or Feedback to Output Disable (Note 3)
MACH210AQ-15/20 (Com’l)
Min
20
20
20
20
6
-15
Max
19
25
25
15
15
Min
25
25
25
25
8
-20
Max
24
30
30
20
20
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns