ZL50110GAG Zarlink, ZL50110GAG Datasheet - Page 38

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ZL50110GAG

Manufacturer Part Number
ZL50110GAG
Description
CESoP Processor 552-Pin BGA Tray
Manufacturer
Zarlink
Datasheet

Specifications of ZL50110GAG

Package
552BGA
Maximum Data Rate
1000 Mbps
Transmission Media Type
Fiber Optic
Power Supply Type
Analog
Typical Supply Current
950(Max) mA
Typical Operating Supply Voltage
1.8 V
Minimum Operating Supply Voltage
1.65 V
Maximum Operating Supply Voltage
1.95 V

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ZL50110GAG2
Manufacturer:
ZARLINK
Quantity:
60
M1_LINKUP_LED
M1_ACTIVE_LED
M1_GIGABIT_LED
M1_REFCLK
M1_RXCLK
M1_RBC0
M1_RBC1
M1_COL
Signal
I/O
I U
I D
I U
I U
I D
O
O
O
Table 11 - MII Port 1 Interface Package Ball Definition
M23
G23 on ZL50110/4
F26 on ZL50111/2
AB25
G25
M22
U26
T25
R25
Package Balls
ZL50110/11/12/14
Zarlink Semiconductor Inc.
MII Port 1
38
LED drive for MAC 1 to indicate port is linked
up.
Logic 0 output = LED on
Logic 1 output = LED off
LED drive for MAC 1 to indicate port is
transmitting or receiving packet data.
Logic 0 output = LED on
Logic 1 output = LED off
LED drive for MAC 1 to indicate operation at
Gbps.
Logic 0 output = LED on
Logic 1 output = LED off
GMII/TBI - Reference Clock input at
125 MHz. Can be used to lock receive
circuitry (RX) to M1_GTXCLK rather than
recovering the RXCLK (or RBC0 and
RBC1). Useful, for example, in the absence
of valid serial data.
NOTE: In MII mode this pin must be driven
with the same clock as M1_RXCLK.
GMII/MII - M1_RXCLK.
Accepts the following frequencies:
125.0 MHz
TBI - M1_RBC0.
Used as a clock when in TBI mode. Accepts
62.5 MHz and is 180°C out of phase with
M1_RBC1.
each rising edge of M1_RBC1 and
M1_RBC0, resulting in 125 MHz sample
rate.
TBI - M1_RBC1
Used as a clock when in TBI mode. Accepts
62.5 MHz, and is 180° out of phase with
M1_RBC0. Receive data is clocked at each
rising edge of M1_RBC1 and M1_RBC0,
resulting in 125 MHz sample rate.
GMII/MII - M1_COL.
Collision Detection. This signal is
independent of M1_TXCLK and
M1_RXCLK, and is asserted when a
collision is detected on an attempted
transmission. It is active high, and only
specified for half-duplex operation.
25.0 MHz
Receive data is clocked at
MII
GMII 1 Gbps
Description
100 Mbps
Data Sheet

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