ZL50110GAG Zarlink, ZL50110GAG Datasheet - Page 66

• Manufacturer Part Number: ZL50110GAG
• Description: CESoP Processor 552-Pin BGA Tray
• Manufacturer: Zarlink

Specifications of ZL50110GAG

• Package: 552BGA
• Maximum Data Rate: 1000 Mbps
• Transmission Media Type: Fiber Optic
• Power Supply Type: Analog
• Typical Supply Current: 950(Max) mA
• Typical Operating Supply Voltage: 1.8 V
• Minimum Operating Supply Voltage: 1.65 V
• Maximum Operating Supply Voltage: 1.95 V

For in-band differential algorithm, the ZL50110/11/12/14 inserts the timestamp after the packet payload is fully
assembled. The insertion-time may be in error by up to 8 UI of the nominal service clock (for example 8 * 488 ns of
an E1 interface).This variable error will occur in unstructured mode only, and result in degradation of performance
at the remote end, which uses the timestamps to recover a clock frequency. This error is most likely to occur when
there are many asynchronous (PDH) clocks that are close in frequency. In this case it is recommended to used the
Zarlink proprietary in-band differential.
Also, for in-band differential clock recovery, the frequency must be the same as the common clock frequency.
6.2
For applications where there is no common reference clock between provider edge units, an adaptive clock
recovery technique is provided. The Adaptive clock recovery solution provided in the Zarlink CESoP products is a
combination hardware and software. The chip contains a DCO per TDM port in unstructured mode, that enables the
recovery of up to 32 independent clocks. The timing algorithm resides in the API and runs out of the host processor.
The basic information is transmitted using timestamps. Current CES standards allow for using of timestamps.
Timestamps may be implied by the value of the sequence numbers, or it can be formatted as RTP timestamps.
When a packet containing TDM data is sent, an RTP timestamp and/or sequence number is placed into the packet
header. On arrival at the receiving device, the arrival time is noted in the form of a local timestamp, driven by the
output clock of the TDM port it is destined for.
The recovered clock at the egress point of the ZL50110/11/12/14 is based on non-linear filtering of the timestamps
that are carried in the CESoP packets. The performance of the clock recovery is greatly improved by applying these
non-liner filtering techniques. The adaptive clock recovery performance is dependent on the network configuration
and operation, if the loading of the network is constrained, then the wander of the recovered clock will not exceed
the specified limits.
Adaptive Clock Recovery
LIU
Data
Source
Clock
ZL5011x
source
node
Timestamp
generation
Figure 18 - Differential Clock Recovery
Packets
ZL50110/11/12/14
Zarlink Semiconductor Inc.
Network
clock
PRS
66
Packets
ZL5011x
destination
node
Host CPU
Timestamp
extraction
recovery
Timing
DCO
Data
Dest'n
Clock
LIU
Data Sheet