DS21Q55N Maxim Integrated Products, DS21Q55N Datasheet - Page 13

• Manufacturer Part Number: DS21Q55N
• Description: Framer E1/J1/T1 3.3V 256-Pin BGA
• Manufacturer: Maxim Integrated Products

Specifications of DS21Q55N

• Package: 256BGA
• Number Of Transceivers: 4
• Standard Framing Format: E1|J1|T1
• Maximum Supply Current: 75(Typ) mA
• Minimum Single Supply Voltage: 3.135 V
• Maximum Single Supply Voltage: 3.465 V

Reader’s Note: This data sheet assumes a particular nomenclature of the T1 operating environment. In
each 125ms frame there are 24 8-bit channels plus a framing bit. It is assumed that the framing bit is sent
first followed by channel 1. Each channel is made up of eight bits that are numbered 1 to 8. Bit number 1
is the MSB and is transmitted first. Bit number 8 is the LSB and is transmitted last. The term “locked” is
used to refer to two clock signals that are phase- or frequency-locked or derived from a common clock
(i.e., a 1.544MHz clock can be locked to a 2.048MHz clock if they share the same 8kHz component).
Throughout this data sheet, the following abbreviations are used:
B8ZS
BOC
CRC
D4
ESF
FDL
FPS
Fs
Ft
HDLC
MF
SLC–96
Bipolar with 8 Zero Substitution
Bit-Oriented Code
Cyclical Redundancy Check
Superframe (12 frames per multiframe) Multiframe Structure
Extended Superframe (24 frames per multiframe) Multiframe Structure
Facility Data Link
Framing Pattern Sequence in ESF
Signaling Framing Pattern in D4
Terminal Framing Pattern in D4
High-Level Data Link Control
Multiframe
Subscriber Loop Carrier—96 Channels
13 of 237