DS21Q55N Maxim Integrated Products, DS21Q55N Datasheet - Page 7
DS21Q55N
Manufacturer Part Number
DS21Q55N
Description
Framer E1/J1/T1 3.3V 256-Pin BGA
Manufacturer
Maxim Integrated Products
Datasheet
1.DS21Q55N.pdf
(237 pages)
Specifications of DS21Q55N
Package
256BGA
Number Of Transceivers
4
Standard Framing Format
E1|J1|T1
Maximum Supply Current
75(Typ) mA
Minimum Single Supply Voltage
3.135 V
Maximum Single Supply Voltage
3.465 V
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DS21Q55 Quad T1/E1/J1 Transceiver
Figure 31-17. G.802 Timing, E1 Mode Only.............................................................................................................216
Figure 31-18. Transmit-Side Timing .........................................................................................................................216
Figure 31-19. Transmit-Side Boundary Timing (Elastic Store Disabled)..................................................................217
Figure 31-20. Transmit-Side Boundary Timing, TSYSCLK = 1.544MHz (Elastic Store Enabled) ..........................217
Figure 31-21. Transmit-Side Boundary Timing, TSYSCLK = 2.048MHz (Elastic Store Enabled) ...........................218
Figure 31-22. Transmit IBO Channel Interleave Mode Timing.................................................................................219
Figure 31-23. Transmit IBO Frame Interleave Mode Timing....................................................................................220
Figure 33-1. Intel Bus Read Timing (BTS = 0/MUX = 1) ..........................................................................................224
Figure 33-2. Intel Bus Write Timing (BTS = 0/MUX = 1) ..........................................................................................224
Figure 33-3. Motorola Bus Timing (BTS = 1/MUX = 1) ............................................................................................225
Figure 33-4. Intel Bus Read Timing (BTS = 0/MUX = 0) ..........................................................................................227
Figure 33-5. Intel Bus Write Timing (BTS = 0/MUX = 0) ..........................................................................................227
Figure 33-6. Motorola Bus Read Timing (BTS = 1/MUX = 0)...................................................................................228
Figure 33-7. Motorola Bus Write Timing (BTS = 1/MUX = 0) ...................................................................................228
Figure 33-8. Receive-Side Timing ............................................................................................................................230
Figure 33-9. Receive-Side Timing, Elastic Store Enabled .......................................................................................231
Figure 33-10. Receive Line Interface Timing............................................................................................................231
Figure 33-11. Transmit-Side Timing .........................................................................................................................233
Figure 33-12. Transmit-Side Timing, Elastic Store Enabled ....................................................................................234
Figure 33-13. Transmit Line Interface Timing...........................................................................................................234
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