DS21Q55N Maxim Integrated Products, DS21Q55N Datasheet - Page 19

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DS21Q55N

Manufacturer Part Number
DS21Q55N
Description
Framer E1/J1/T1 3.3V 256-Pin BGA
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS21Q55N

Package
256BGA
Number Of Transceivers
4
Standard Framing Format
E1|J1|T1
Maximum Supply Current
75(Typ) mA
Minimum Single Supply Voltage
3.135 V
Maximum Single Supply Voltage
3.465 V
Signal Name:
Signal Description:
Signal Type:
Demand clock for the transmit link data [TLINK] input.
T1 Mode: A 4kHz or 2kHz (ZBTSI) clock.
E1 Mode: A 4kHz to 20kHz clock.
Signal Name:
Signal Description:
Signal Type:
If enabled, this pin is sampled on the falling edge of TCLK for data insertion into either the FDL stream (ESF) or
the Fs-bit position (D4), or the Z-bit position (ZBTSI) or any combination of the Sa-bit positions (E1).
Signal Name:
Signal Description:
Signal Type:
A pulse at this pin establishes either frame or multiframe boundaries for the transmit side. Can be programmed to
output either a frame or multiframe pulse. If this pin is set to output pulses at frame boundaries, it can also be set by
IOCR1.3 to output double-wide pulses at signaling frames in T1 mode.
Signal Name:
Signal Description:
Signal Type:
Only used when the transmit-side elastic store is enabled. A pulse at this pin establishes either frame or multiframe
boundaries for the transmit side. Should be connected low in applications that do not use the transmit-side elastic
store.
Signal Name:
Signal Description:
Signal Type:
When enabled, this input samples signaling bits for insertion into outgoing PCM data stream. Sampled on the
falling edge of TCLK when the transmit-side elastic store is disabled. Sampled on the falling edge of TSYSCLK
when the transmit-side elastic store is enabled.
TLCLKx
Transmit Link Clock
Output
TLINKx
Transmit Link Data
Input
TSYNCx
Transmit Sync
Input/Output
TSSYNCx
Transmit System Sync
Input
TSIGx
Transmit Signaling Input
Input
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