GS84036AT-166 GSI TECHNOLOGY, GS84036AT-166 Datasheet - Page 9

• Manufacturer Part Number: GS84036AT-166
• Description: SRAM Chip Sync Quad 3.3V 4M-Bit 128K x 36 8.5ns/3.5ns 100-Pin TQFP Tray
• Manufacturer: GSI TECHNOLOGY

Specifications of GS84036AT-166

• Package: 100TQFP
• Timing Type: Synchronous
• Density: 4 Mb
• Data Rate Architecture: SDR
• Typical Operating Supply Voltage: 3.3 V
• Address Bus Width: 17 Bit
• Number Of I/o Lines: 36 Bit
• Number Of Ports: 4
• Number Of Words: 128K

Rev: 1.19a 2/2008
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
BGA Pin Description
ADSP, ADSC
Symbol
A
E
DQP
DQP
DQP
DQP
V
ADV
DQ
DQ
DQ
LBO
BW
GW
V
V
DQ
NC
0
CK
1
B
B
B
B
ZZ
FT
E
DDQ
G
, A
A
, E
DD
SS
C
D
A
B
2
A
B
D
A
C
D
B
1
3
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
In
In
In
In
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
-
Address Strobe (Processor, Cache Controller); active low
Address field LSBs and Address Counter Preset Inputs
9/31
Burst address counter advance enable; active low
Global Write Enable—Writes all bytes; active low
Byte Write signal for data inputs DQ
Byte Write signal for data inputs DQ
Byte Write signal for data inputs DQ
Byte Write signal for data inputs DQ
Byte Write—Writes all enabled bytes; active low
Flow Through or Pipeline mode; active low
Linear Burst Order mode; active low
Byte C Data Input and Output pins
Byte D Data Input and Output pins
Byte A Data Input and Output pins
Byte B Data Input and Output pins
Sleep Mode control; active high
Clock Input Signal; active high
Output driver power supply
Output Enable; active low
Chip Enable; active high
9th Data I/O Pin; Byte A
9th Data I/O Pin; Byte B
9th Data I/O Pin; Byte C
9th Data I/O Pin; Byte D
Chip Enable; active low
I/O and Core Ground
Core power supply
Address Inputs
Description
No Connect
GS84018/32/36AT/B-180/166/150/100
A
B
C
D
; active low
; active low
; active low
; active low
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