CN8237EBGB Mindspeed Technologies, CN8237EBGB Datasheet - Page 145

• Manufacturer Part Number: CN8237EBGB
• Description: ATM SAR 622Mbps 3.3V ABR/CBR/GFR/UBR/VBR 456-Pin BGA
• Manufacturer: Mindspeed Technologies

Specifications of CN8237EBGB

• Package: 456BGA
• Traffic Class: ABR|CBR|GFR|UBR|VBR
• Utopia Type: Level 1|Level 2
• Host Interface: PCI
• Maximum Data Rate: 622 Mbps
• Typical Operating Supply Voltage: 3.3 V
• Minimum Operating Supply Voltage: 3.135 V

Table 5-12. Reassembly VCC Table Descriptions (3 of 3)
CN8237
ATM OC-12 ServiceSAR Plus with xBR Traffic Management
5.7.3 Reassembly Buffer Descriptor Structure
28237-DSH-001-C
CURR_BD_PNTR
CBFR1
SEG_VCC_INDEX
SERV_DIS
ERS_INDEX
RX_COUNTER/
VPC_INDEX
D_EN_NCR
ACR_NOT_ER
D_NCR_TRIG
D_NCR_DIR
CONG_ID
EN_EXP_CNG
EN_IMP_CNG
EXP_TA_CI
EXP_TA_NI
EXP_TA_ER
D_NCR_HI_EXP
D_NCR_HI_MANT
D_NCR_LO_EXP
D_NCR_LO_MANT
Field Name
Current buffer descriptor pointer. Pointer to the buffer descriptor corresponding to the current buffer
in use.
Current BFR1 indication. A logic high indicates that current buffer is from BFR1 pool and logic low
indicates from BFR0 pool.
Channel index of corresponding segmentation channel. Used by ER and PM-OAM processing.
Service Discard counter. Counts the number of CPCS-PDUs discarded due to either LANE_LECID
echo suppression, CLP discard, or frame relay DE discard.
Index into ER_SHIFT table for implicit congestion ER reduction. Base table address is given by
ER_SHIFT_B register field.
When ABR_VPC is a logic low, RX_COUNTER is the firewall mode credit counter. When ABR_VPC is
a logic high, VPC_INDEX is used to control a VPC group. See ABR_VPC for description of this field.
Enable destination ACR/ER change notification processing.
Logic high results in CR change notification, logic low results in ER change notification.
Destination ACR/ER change has been triggered. Initialize to logic low.
Indicates direction of destination ACR/ER trigger, logic high for HI, logic low for LO.
Congestion Identification number
Enables explicit congestion ER reduction mechanism
Enables implicit congestion ER reduction mechanism—note: not valid when EN_EXP_CNG is logic
high.
Set CI to logic high in turned-around BCK RM cells.
Set NI to logic high in turned-around BCK RM cells.
Set ER to minimum of this value and in coming FWD RM ER value in turned-around BCK RM cells
when EN_EXP_CNG is logic high.
Destination ACR/ER upper threshold, exponent portion.
Destination ACR/ER upper threshold, mantissa portion.
Destination ACR/ER lower threshold, exponent portion.
Destination ACR/ER lower threshold, mantissa portion.
Reassembly buffer descriptors reside on word-aligned addresses in host memory.
The host controls the allocation and management of reassembly buffer
descriptors.
to an associated reassembly data buffer, in the BUFF_PTR field.
NOTE:
During initialization in each buffer descriptor entry, the host writes a pointer
Tables 5-13
MSTR_CTRL_DWORD must be set to 1.
Mindspeed Technologies
and
5-14
describe the format of the reassembly buffer descriptors.
Description/Function
™
5.7 Reassembly Control and Data Structures
5.0 Reassembly Coprocessor
5-37