CN8237EBGB Mindspeed Technologies, CN8237EBGB Datasheet - Page 306

• Manufacturer Part Number: CN8237EBGB
• Description: ATM SAR 622Mbps 3.3V ABR/CBR/GFR/UBR/VBR 456-Pin BGA
• Manufacturer: Mindspeed Technologies

Specifications of CN8237EBGB

• Package: 456BGA
• Traffic Class: ABR|CBR|GFR|UBR|VBR
• Utopia Type: Level 1|Level 2
• Host Interface: PCI
• Maximum Data Rate: 622 Mbps
• Typical Operating Supply Voltage: 3.3 V
• Minimum Operating Supply Voltage: 3.135 V

14.0 CN8237 Registers
14.4 Scheduler Registers
0x158
14-16
31–28
22–18
16–15
14–12
11–10
9–6
5–4
3–0
Bit
27
26
25
24
23
17
—
Scheduler Control Register (SCH_CTRL)
Field
Size
4
1
1
1
1
1
5
1
2
3
2
4
2
4
HD_TL_PRI_SEL
SCHREFx4
USE_SCHREF
Reserved
NCR_EN_DEST
NCR_EN_SRC
NCR_STAT_ID
EN_NCR_STAT
Reserved
SLOT_DEPTH
Reserved
TUN_PRI0_OFFSET
Reserved
VBR_OFFSET
The SCH_CTRL register defines the configured schedule slot and priority and
VBR offsets, when 16 priority queues are used.
Name
Mindspeed Technologies
Selects priority queue head/tail pointers to be read in the SCH_HD_TL
register.
When logic high, three extra clock edges are generated internally for each
rising edge of SCHREF. This allows a 622 cell clock to be generated from
quad peak 7.
If logic high, the SCHREF input is used as the clock for defining a schedule
table slot period in conjunction with SLOT_PER. If logic low, SYSCLK is
used.
NOTE:
Program and read as 0.
Global enable for destination ACR notification.
Global enable for source ACR notification.
Identifies the status queue to be used for both source and destination
ACR/ER notification when EN_NCR_STAT is asserted.
Enable global status queue for both source and destination ACR/ER
notification.
Program and read as 0.
Depth of the schedule slot is set to 1 + SLOT_DEPTH words. Active only if
USE_SCH_CTRL is asserted.
Program and read as 0.
Offset from the TUN_PRI_0 field in the schedule table and CBR VCC table.
Active only if USE_SCH_CTRL is asserted.
Program and read as 0.
Offset from schedule slot priority to general priority. Active only if
USE_SCH_CTRL is asserted.
Must be set to 0 during initialization unless using an
internal control register.
ATM OC-12 ServiceSAR Plus with xBR Traffic Management
™
Description
28237-DSH-001-C
CN8237