PEB20534H-10V2.1 Infineon Technologies, PEB20534H-10V2.1 Datasheet - Page 335
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PEB20534H-10V2.1
Manufacturer Part Number
PEB20534H-10V2.1
Description
Communication Controller 208-Pin FQFP
Manufacturer
Infineon Technologies
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Data Sheet
TCDE
TC(7:0)
Termination Character Detection Enable
This bit is valid in ASYNC/BISYNC modes only and enables/disables the
termination character detection mechanism:
TCDE = ’0’
TCDE = ’1’
Termination Character
This bit-field defines the termination character which is monitored on the
receive data stream if enabled via bit ’TCDE’.
No receive termination character detection is performed.
The termination character detection is enabled. The
receive data stream is monitored for the occurence of a
termination character (TC) programmed via bit field ’TC’.
When this character is detected, an internal ’frame end /
block end’ indication is generated. This causes the DMA
controller to complete the current receive descriptor and
branch to the next receive descriptor address.
Note: If the programmed character length (bit field ’CHL’
in register CCR2) is less than 8 bits, the most
significant unused bits of bit field ’TC’ must be set to
’0’. Otherwise no termination character will be
detected.
335
Detailed Register Description
(async/bisync modes)
(async/bisync modes)
PEB 20534
PEF 20534
2000-05-30
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