LPC1754FBD80,518 NXP Semiconductors, LPC1754FBD80,518 Datasheet - Page 21

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LPC1754FBD80,518

Manufacturer Part Number
LPC1754FBD80,518
Description
IC MCU 32BIT 128KB FLASH 80LQFP
Manufacturer
NXP Semiconductors
Series
LPC17xxr
Datasheet

Specifications of LPC1754FBD80,518

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
100MHz
Connectivity
CAN, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
Number Of I /o
52
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 6x12b, D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-LQFP
Package
80LQFP
Device Core
ARM Cortex M3
Family Name
LPC1700
Maximum Speed
100 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
52
Interface Type
CAN/I2C/SPI/UART/USB
On-chip Adc
6-chx12-bit
Number Of Timers
4
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC1754FBD80,518
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Part Number:
LPC1754FBD80,518
Manufacturer:
NXP/恩智浦
Quantity:
20 000
NXP Semiconductors
LPC1759_58_56_54_52_51
Product data sheet
7.13.1 Features
7.14.1 Features
7.15.1 Features
7.14 12-bit ADC
7.15 10-bit DAC (LPC1759/58/56/54 only)
The LPC1759/58/56/54/52/51 contain one ADC. It is a single 12-bit successive
approximation ADC with six channels and DMA support.
The DAC allows to generate a variable analog output. The maximum output value of the
DAC is VREFP.
One or two CAN controllers and buses.
Data rates to 1 Mbit/s on each bus.
32-bit register and RAM access.
Compatible with CAN specification 2.0B, ISO 11898-1.
Global Acceptance Filter recognizes standard (11-bit) and extended-frame (29-bit)
receive identifiers for all CAN buses.
Acceptance Filter can provide FullCAN-style automatic reception for selected
Standard Identifiers.
FullCAN messages can generate interrupts.
12-bit successive approximation ADC.
Input multiplexing among 6 pins.
Power-down mode.
Measurement range VREFN to VREFP.
12-bit conversion rate: 200 kHz.
Individual channels can be selected for conversion.
Burst conversion mode for single or multiple inputs.
Optional conversion on transition of input pin or Timer Match signal.
Individual result registers for each ADC channel to reduce interrupt overhead.
DMA support.
10-bit DAC
Resistor string architecture
Buffered output
Power-down mode
Selectable output drive
Dedicated conversion timer
DMA support
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 29 March 2011
LPC1759/58/56/54/52/51
32-bit ARM Cortex-M3 microcontroller
© NXP B.V. 2011. All rights reserved.
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