LPC1754FBD80,518 NXP Semiconductors, LPC1754FBD80,518 Datasheet - Page 58

• Manufacturer Part Number: LPC1754FBD80,518
• Description: IC MCU 32BIT 128KB FLASH 80LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1754FBD80,518

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: CAN, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 52
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 6x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-LQFP
• Package: 80LQFP
• Device Core: ARM Cortex M3
• Family Name: LPC1700
• Maximum Speed: 100 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 52
• Interface Type: CAN/I2C/SPI/UART/USB
• On-chip Adc: 6-chx12-bit
• Number Of Timers: 4
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

NXP Semiconductors
12. ADC electrical characteristics
Table 17.
V
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
LPC1759_58_56_54_52_51
Product data sheet
Symbol
V
C
E
E
E
E
E
R
f
f
clk(ADC)
c(ADC)
DDA
IA
D
L(adj)
O
G
T
ia
vsi
The ADC is monotonic, there are no missing codes.
The differential linearity error (E
The integral non-linearity (E
appropriate adjustment of gain and offset errors. See
The offset error (E
ideal curve. See
ADCOFFS value (bits 7:4) = 2 in the ADTRM register. See LPC17xx user manual UM10360.
The gain error (E
error, and the straight line which fits the ideal transfer curve. See
The absolute error (E
ADC and the ideal transfer curve. See
See
The conversion frequency corresponds to the number of samples per second.
= 2.7 V to 3.6 V; T
Figure
ADC characteristics (full resolution)
Parameter
analog input voltage
analog input capacitance
differential linearity error
integral non-linearity
offset error
gain error
absolute error
voltage source interface
resistance
ADC clock frequency
ADC conversion frequency
26.
Figure
G
O
) is the relative difference in percent between the straight line fitting the actual transfer curve after removing offset
) is the absolute difference between the straight line which fits the actual curve and the straight line which fits the
T
amb
) is the maximum difference between the center of the steps of the actual transfer curve of the non-calibrated
25.
Fig 24. SPI slave timing (CPHA = 0)
=
L(adj)

40
D
) is the peak difference between the center of the steps of the actual and the ideal transfer curve after
) is the difference between the actual step width and the ideal step width. See

C to +85
Figure
SCK (CPOL = 0)
SCK (CPOL = 1)
All information provided in this document is subject to legal disclaimers.
Conditions

25.
C unless otherwise specified; ADC frequency 13 MHz; 12-bit resolution.
MOSI
MISO
Rev. 7 — 29 March 2011
Figure
25.
Figure
DATA VALID
DATA VALID
t
SPIQV
LPC1759/58/56/54/52/51
25.
[1][2]
[4][5]
[3]
[6]
[7]
[8]
[9]
T
SPICYC
Min
0
-
-
-
-
-
-
-
-
-
t
32-bit ARM Cortex-M3 microcontroller
SPIDSU
DATA VALID
DATA VALID
t
SPICLKH
t
Typ
-
-
-
-
-
-
-
-
-
-
SPIDH
t
SPICLKL
t
002aad989
SPIOH
Max
V
15
1
3
2
0.5
4
7.5
13
200
Figure
© NXP B.V. 2011. All rights reserved.
DDA
25.
Unit
V
pF
LSB
LSB
LSB
%
LSB
k
MHz
kHz
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