STM32F405RGT6 STMicroelectronics, STM32F405RGT6 Datasheet - Page 106

Microcontrollers (MCU) ARM M4 1024 FLASH 168 Mhz 192kB SRAM

STM32F405RGT6

Manufacturer Part Number
STM32F405RGT6
Description
Microcontrollers (MCU) ARM M4 1024 FLASH 168 Mhz 192kB SRAM
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32F405RGT6

Core
ARM Cortex M4
Processor Series
STM32F4
Data Bus Width
32 bit
Maximum Clock Frequency
168 MHz
Program Memory Size
1024 KB
Data Ram Size
192 KB
On-chip Adc
Yes
Number Of Programmable I/os
51
Number Of Timers
10
Operating Supply Voltage
1.7 V to 3.6 V
Package / Case
LQFP-64
Mounting Style
SMD/SMT
A/d Bit Size
12 bit
A/d Channels Available
16
Interface Type
CAN, I2C, I2S, SPI, UART
Program Memory Type
Flash
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
STM32F405RGT6
Manufacturer:
ON
Quantity:
1 001
Part Number:
STM32F405RGT6
Manufacturer:
STMicroelectronics
Quantity:
10 000
Part Number:
STM32F405RGT6
Manufacturer:
ST
Quantity:
68
Part Number:
STM32F405RGT6
Manufacturer:
ST
0
Part Number:
STM32F405RGT6
Manufacturer:
ST
Quantity:
20 000
Part Number:
STM32F405RGT6
0
Part Number:
STM32F405RGT6&AR
0
Part Number:
STM32F405RGT6TR
Manufacturer:
ST
0
Company:
Part Number:
STM32F405RGT6TR
Quantity:
20 000
Part Number:
STM32F405RGT6V
Manufacturer:
ST
0
Part Number:
STM32F405RGT6W
0
Electrical characteristics
106/167
Table 50.
1. Guaranteed by design, not tested in production.
2. f
3. The maximum hold time of the Start condition has only to be met if the interface does not stretch the low
4. The device must internally provide a hold time of at least 300ns for the SDA signal in order to bridge the
t
w(STO:STA)
Symbol
t
t
t
t
t
w(SCLH)
w(SCLL)
t
su(SDA)
t
t
su(STO)
achieve fast mode I
clock.
period of SCL signal.
undefined region of the falling edge of SCL.
t
t
t
su(STA)
h(SDA)
PCLK1
r(SDA)
h(STA)
r(SCL)
f(SDA)
f(SCL)
C
b
must be at least 2 MHz to achieve standard mode I
SCL clock low time
SCL clock high time
SDA setup time
SDA data hold time
SDA and SCL rise time
SDA and SCL fall time
Start condition hold time
Repeated Start condition
setup time
Stop condition setup time
Stop to Start condition time
(bus free)
Capacitive load for each bus
line
I
2
C characteristics
2
C frequencies, and a multiple of 10 MHz to reach the 400 kHz maximum I
Parameter
Doc ID 022152 Rev 2
Standard mode I
Min
250
0
4.7
4.0
4.0
4.7
4.0
4.7
(3)
-
-
-
2
C frequencies. It must be at least 4 MHz to
1000
Max
300
400
-
-
-
-
-
-
-
-
2
C
(1)
STM32F405xx, STM32F407xx
20 + 0.1C
Fast mode I
Min
100
0
1.3
0.6
0.6
0.6
0.6
1.3
(4)
-
-
b
2
C
900
Max
300
300
400
(1)(2)
2
-
-
-
-
-
-
-
C fast mode
(3)
Unit
μs
μs
pF
µs
ns
µs

Related parts for STM32F405RGT6