RC28F128P33BF60A Micron Technology Inc, RC28F128P33BF60A Datasheet - Page 19
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RC28F128P33BF60A
Manufacturer Part Number
RC28F128P33BF60A
Description
Manufacturer
Micron Technology Inc
Datasheet
1.RC28F128P33BF60A.pdf
(88 pages)
Specifications of RC28F128P33BF60A
Lead Free Status / Rohs Status
Supplier Unconfirmed
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Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
RC28F128P33BF60A
Manufacturer:
Micron Technology Inc
Quantity:
10 000
P33-65nm SBC
Table 6:
Datasheet
19
Notes:
1.
2.
3.
4.
5.
Configuration
Protection
Others
Mode
First command cycle address should be the same as the operation’s target address.
DBA = Device Base Address
DnA = Address within the device.
IA = Identification code address offset.
CFI-A = Read CFI address offset.
WA = Word address of memory location to be written.
BA = Address within the block.
OTP-RA = OTP Register address.
LRA = Lock Register address.
RCD = Read Configuration Register data on A[16:1].
ID = Identifier data.
CFI-D = CFI data on DQ[15:0].
SRD = Status Register data.
WD = Word data.
N = Word count of data to be loaded into the write buffer.
OTP-D = OTP Register data.
LRD = Lock Register data.
The second cycle of the Buffered Program Command is the word count of the data to be loaded into the write buffer. This
is followed by up to
operation.
The confirm command (0xD0) is followed by the buffer data.
The second cycle is a Sub-Op-Code, the data written on third cycle is N-1; 1≤ N ≤ 256. The subsequent cycles load data
words into the program buffer at a specified address until word count is achieved, after the data words are loaded, the
final cycle is the confirm cycle 0xD0).
Command Bus Cycles (Sheet 2 of 2)
Lock Block
Unlock Block
Lock-down Block
Program OTP
Register
Program Lock
Register
Program Read
Configuration
Register
Blank Check
Extended Function
Interface
Command
(5)
256
words of data.Then the confirm command (0xD0) is issued, triggering the array programming
Cycles
Bus
>2
2
2
2
2
2
2
2
Oper
Write
Write
Write
Write
Write
Write
Write
Write
First Bus Cycle
Addr
RCD
PRA
LRA
WA
BA
BA
BA
BA
(1)
Data
0xC0
0xC0
0xBC
0xEB
0x60
0x60
0x60
0x60
(2)
Oper
Write
Write
Write
Write
Write
Write
Write
Write
Second Bus Cycle
Order Number:208034-04
Addr
OTP-RA
RCD
LRA
WA
BA
BA
BA
BA
(1)
Data
Sub-Op
OTP-D
0x01
0xD0
0x03
0x2F
code
LRD
D0
Jul 2011
(2)