RC28F128P33BF60A Micron Technology Inc, RC28F128P33BF60A Datasheet - Page 50

• Manufacturer Part Number: RC28F128P33BF60A
• Manufacturer: Micron Technology Inc

Specifications of RC28F128P33BF60A

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Table 24: AC Read Specifications - (Sheet 2 of 2)
Datasheet
50
Clock Specifications
Synchronous Specifications
Notes:
1.
2.
3.
4.
5.
6.
Num
R104
R105
R106
R108
R111
R200
R201
R202
R203
R301
R302
R303
R304
R305
R306
R307
R311
R312
See
allowable input slew rate.
OE# may be delayed by up to t
Sampled, not 100% tested.
Address hold in synchronous burst read mode is t
Synchronous burst read mode is not supported with TTL level inputs.
Applies only to subsequent synchronous reads.
t
CHQV / tCLQV
Figure 14, “AC Input/Output Reference Waveform” on page 48
Symbol
t
FCLK/RCLK
t
t
t
t
t
t
t
AVCH/L
VLCH/L
ELCH/L
t
t
t
t
t
t
t
CHQX
VHVL
VHAX
t
CH/CL
CHAX
CHTV
CHVL
CHTX
VLVH
phvh
f
APA
CLK
CLK
ADV# pulse width low
ADV# pulse width high
Address hold from ADV# high
Page address access
RST# high to ADV# high
CLK frequency
CLK period
CLK high/low time
CLK fall/rise time
Address setup to CLK
ADV# low setup to CLK
CE# low setup to CLK
CLK to output valid
Output hold from CLK
Address hold from CLK
CLK to WAIT valid
CLK Valid to ADV# Setup
WAIT Hold from CLK
(5)
ELQV
– t
GLQV
Parameter
after CE#’s falling edge without impact to t
CHAX
or t
VHAX
, whichever timing specification is satisfied first.
Easy BGA
Easy BGA
Easy BGA
Easy BGA
Easy BGA
Easy BGA
Easy BGA
TSOP
TSOP
TSOP
TSOP
TSOP
TSOP
TSOP
19.2
Min
0.3
10
10
30
25
10
9
5
9
9
9
9
3
5
3
3
5
-
-
-
-
-
-
-
for timing measurements and max
ELQV.
Max
25
52
40
17
20
17
20
3
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Order Number: 208034-04
Unit
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
P33-65nm
1,3,5,6
Notes
Jul 2011
1,4,6
1,4
1,6
1,6
1,6
1,6
1,6
1,6
1,6
1,6
1,6
1,6
1,6
1
1
1
1