IDT82P2821BHG IDT, Integrated Device Technology Inc, IDT82P2821BHG Datasheet - Page 107

• Manufacturer Part Number: IDT82P2821BHG
• Description: IC LINE INTERFACE UNIT 640-PBGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT82P2821BHG

• Function: Line Interface Unit (LIU)
• Interface: E1, J1, T1
• Number Of Circuits: 1
• Voltage - Supply: 1.8V, 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: *
• Includes: Defect and Alarm Detection, Driver Over-Current Detection and Protection, LLOS Detection, PRBSARB / IB Detection and Generation
• Number Of Transceivers: 1
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Power (watts): -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 800-1703; 82P2821BHG

INTM0 - Interrupt Mask Register 0
Address: 01BH, 05BH, 09BH, 0DBH, 11BH, 15BH, 19BH, 1DBH, (CH1~CH8)
Type: Read / Write
Default Value: FFH
Programming Information
IDT82P2821
Bit
DAC_IM
7
6
5
4
3
2
1
0
21BH, 25BH, 29BH, 2DBH, 31BH, 35BH, 39BH, 3DBH, (CH9~CH16)
41BH, 45BH, 49BH, 4DBH, 51BH, (CH17~CH21)
7DBH (CH0)
7
TCKLOS_IM
SLOS_IM
TLOS_IM
LLOS_IM
DAC_IM
TOC_IM
RJA_IM
TJA_IM
Name
TJA_IM
6
This bit is the waveform amplitude overflow interrupt mask.
0: Interrupt is enabled.
1: Interrupt is masked. (default)
This bit is the TJA FIFO overflow and underflow interrupt mask.
0: Interrupt is enabled.
1: Interrupt is masked. (default)
This bit is the RJA FIFO overflow and underflow interrupt mask.
0: Interrupt is enabled.
1: Interrupt is masked. (default)
This bit is the Line Driver TOC interrupt mask.
0: Interrupt is enabled.
1: Interrupt is masked. (default)
This bit is the TCLKn missing interrupt mask.
0: Interrupt is enabled.
1: Interrupt is masked. (default)
This bit is the TLOS interrupt mask.
0: Interrupt is enabled.
1: Interrupt is masked. (default)
This bit is the SLOS interrupt mask.
0: Interrupt is enabled.
1: Interrupt is masked. (default)
This bit is the LLOS interrupt mask.
0: Interrupt is enabled.
1: Interrupt is masked. (default)
RJA_IM
5
TOC_IM
4
21(+1) CHANNEL HIGH-DENSITY T1/E1/J1 LINE INTERFACE UNIT
107
TCKLOS_IM
3
Description
TLOS_IM
2
SLOS_IM
1
February 6, 2009
LLOS_IM
0