SI3019-F-FT Silicon Laboratories Inc, SI3019-F-FT Datasheet

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SI3019-F-FT

Manufacturer Part Number
SI3019-F-FT
Description
IC VOICE DAA GCI/PCM/SPI 16TSSOP
Manufacturer
Silicon Laboratories Inc
Type
Chipsetr
Datasheets

Specifications of SI3019-F-FT

Package / Case
16-TSSOP
Function
Data Access Arrangement (DAA)
Interface
GCI, PCM, SPI
Number Of Circuits
1
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
8.5mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Includes
Line Voltage Monitor, Loop Current Monitor, Overload Detection, Parallel Handset Detection, Polarity Reversal Detection, TIP and
Product
Modem Chip
Supply Voltage (min)
3 V
Supply Current
8.5 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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Manufacturer
Quantity
Price
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G
Features
Applications
Description
The Si3050+Si3018/19 Voice DAA chipset provides a highly-programmable and
globally-compliant foreign exchange office (FXO) analog interface that is ideal for
DSL IADs, PBXs, IP-PBXs, and VoIP gateway products. The solution implements
Silicon Laboratories' patented isolation capacitor technology, which eliminates the
need for costly isolation transformers, relays, or opto-isolators, while providing
superior surge immunity for robust field performance. The Voice DAA is available
in one 20-pin TSSOP (Si3050) and one 16-pin TSSOP/SOIC (Si3018/19) and
requires minimal external components. The Si3050 interfaces directly to standard
telephony PCM interfaces.
Functional Block Diagram
Rev. 1.2 1/08
PCM highway data interface
µ-law/A-law companding
SPI control interface
GCI interface
80 dB dynamic range TX/RX
Line voltage monitor
Loop current monitor
+6 dBm or +3.2 dBm TX/RX level
mode
Parallel handset detection
3 µA on-hook line monitor current
Overload detection
Programmable line interface
DSL IADs
VoIP gateways
L O B A L
AOUT/INT
SDI THRU
AC termination
DC termination
Ring detect threshold
Ringer impedance
FSYNC
RESET
RGDT
TGDE
SCLK
PCLK
TGD
SDO
DRX
DTX
RG
CS
SDI
V
Interface
Interface
Control
Control
Data
Logic
Data
Line
O I C E
Si3050
Interface
Isolation
D A A
Copyright © 2008 by Silicon Laboratories
TIP/RING polarity detection
Integrated codec and 2- to 4-wire
analog hybrid
Programmable digital hybrid for
near-end echo reduction
Polarity reversal detection
Programmable digital gain in 0.1 dB
increments
Integrated ring detector
Type I and II caller ID support
Pulse dialing support
3.3 V power supply
Daisy-chaining for up to 16 devices
Greater than 5000 V isolation
Patented isolation technology
Ground start and loop start support
Available in Pb-free RoHS-compliant
packages
PBX and IP-PBX systems
Voice mail systems
Interface
Isolation
Si3018/19
Terminations
Ring Detect
Hybrid, AC
and DC
Off-Hook
RX
IB
SC
DCT
VREG
VREG2
DCT2
DCT3
RNG1
RNG2
QB
QE
QE2
US Patent# 5,870,046
US Patent# 6,061,009
Other Patents Pending
AOUT/INT
FSYNC
VREG
RNG1
RGDT
Si3018/19
PCLK
SDO
DCT
C1B
C2B
DRX
DTX
SDI
QE
RG
RX
CS
Ordering Information
IB
Pin Assignments
See page 102.
10
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
9
Si3018/19
Si3050
16
15
14
13
12
11
10
20
19
18
17
16
15
14
13
12
11
9
SDITHRU
GND
V
V
C1A
C2A
RESET
TGDE
TGD
DCT2
IGND
DCT3
QB
QE2
SC
VREG2
RNG2
SCLK
DD
A
Si3050

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