C8051F317-GMR Silicon Laboratories Inc, C8051F317-GMR Datasheet - Page 84
C8051F317-GMR
Manufacturer Part Number
C8051F317-GMR
Description
MCU 8-Bit C8051F31x 8051 CISC 16KB Flash 3.3V 24-Pin QFN EP T/R
Manufacturer
Silicon Laboratories Inc
Datasheet
1.C8051F310-TB.pdf
(228 pages)
Specifications of C8051F317-GMR
Package
24QFN EP
Device Core
8051
Family Name
C8051F31x
Maximum Speed
25 MHz
Ram Size
1.25 KB
Program Memory Size
16 KB
Operating Supply Voltage
3.3 V
Data Bus Width
8 Bit
Program Memory Type
Flash
Number Of Programmable I/os
21
Interface Type
I2C/SMBus/SPI/UART
On-chip Adc
17-chx10-bit
Operating Temperature
-40 to 85 °C
Number Of Timers
4
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F317-GMR
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
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C8051F310/1/2/3/4/5/6/7
84
Notes on Registers, Operands and Addressing Modes:
Rn - Register R0–R7 of the currently selected register bank.
@Ri - Data RAM location addressed indirectly through R0 or R1.
rel - 8-bit, signed (two’s complement) offset relative to the first byte of the following instruction. Used by
SJMP and all conditional jumps.
direct - 8-bit internal data location’s address. This could be a direct-access Data RAM location (0x00–
0x7F) or an SFR (0x80–0xFF).
#data - 8-bit constant
#data16 - 16-bit constant
bit - Direct-accessed bit in Data RAM or SFR
addr11 - 11-bit destination address used by ACALL and AJMP. The destination must be within the same
2 kB page of program memory as the first byte of the following instruction.
addr16 - 16-bit destination address used by LCALL and LJMP. The destination may be anywhere within
the 8 kB program memory space.
There is one unused opcode (0xA5) that performs the same function as NOP.
All mnemonics copyrighted © Intel Corporation 1980.
Rev. 1.7
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