DS21Q55 Maxim Integrated Products, DS21Q55 Datasheet - Page 13

IC TXRX QUAD T1/E1/J1 SCT 256BGA

DS21Q55

Manufacturer Part Number
DS21Q55
Description
IC TXRX QUAD T1/E1/J1 SCT 256BGA
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS21Q55

Function
Transceiver
Interface
E1, J1, T1
Number Of Circuits
4
Voltage - Supply
3.14 V ~ 3.47 V
Current - Supply
75mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
256-BGA
Includes
BERT Generator and Detector, Dual HDLC Controllers
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power (watts)
-

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Reader’s Note: This data sheet assumes a particular nomenclature of the T1 operating environment. In
each 125ms frame there are 24 8-bit channels plus a framing bit. It is assumed that the framing bit is sent
first followed by channel 1. Each channel is made up of eight bits that are numbered 1 to 8. Bit number 1
is the MSB and is transmitted first. Bit number 8 is the LSB and is transmitted last. The term “locked” is
used to refer to two clock signals that are phase- or frequency-locked or derived from a common clock
(i.e., a 1.544MHz clock can be locked to a 2.048MHz clock if they share the same 8kHz component).
Throughout this data sheet, the following abbreviations are used:
B8ZS
BOC
CRC
D4
ESF
FDL
FPS
Fs
Ft
HDLC
MF
SLC–96
Bipolar with 8 Zero Substitution
Bit-Oriented Code
Cyclical Redundancy Check
Superframe (12 frames per multiframe) Multiframe Structure
Extended Superframe (24 frames per multiframe) Multiframe Structure
Facility Data Link
Framing Pattern Sequence in ESF
Signaling Framing Pattern in D4
Terminal Framing Pattern in D4
High-Level Data Link Control
Multiframe
Subscriber Loop Carrier—96 Channels
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